Commit 45f13a57 authored by Xia Jiang's avatar Xia Jiang Committed by Mauro Carvalho Chehab

media: platform: Add jpeg enc feature

Add mtk jpeg encode v4l2 driver based on jpeg decode, because that jpeg
decode and encode have great similarities with function operation.
Reviewed-by: default avatarTomasz Figa <tfiga@chromium.org>
Signed-off-by: default avatarXia Jiang <xia.jiang@mediatek.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent b4a82f5d
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
mtk_jpeg-objs := mtk_jpeg_core.o mtk_jpeg_dec_hw.o mtk_jpeg_dec_parse.o mtk_jpeg-objs := mtk_jpeg_core.o \
mtk_jpeg_dec_hw.o \
mtk_jpeg_dec_parse.o \
mtk_jpeg_enc_hw.o
obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk_jpeg.o obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk_jpeg.o
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
* Copyright (c) 2016 MediaTek Inc. * Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com> * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com> * Rick Chang <rick.chang@mediatek.com>
* Xia Jiang <xia.jiang@mediatek.com>
*/ */
#ifndef _MTK_JPEG_CORE_H #ifndef _MTK_JPEG_CORE_H
...@@ -29,6 +30,8 @@ ...@@ -29,6 +30,8 @@
#define MTK_JPEG_HW_TIMEOUT_MSEC 1000 #define MTK_JPEG_HW_TIMEOUT_MSEC 1000
#define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024)
/** /**
* enum mtk_jpeg_ctx_state - states of the context state machine * enum mtk_jpeg_ctx_state - states of the context state machine
* @MTK_JPEG_INIT: current state is initialized * @MTK_JPEG_INIT: current state is initialized
...@@ -104,6 +107,7 @@ struct mtk_jpeg_dev { ...@@ -104,6 +107,7 @@ struct mtk_jpeg_dev {
/** /**
* struct jpeg_fmt - driver's internal color format data * struct jpeg_fmt - driver's internal color format data
* @fourcc: the fourcc code, 0 if not applicable * @fourcc: the fourcc code, 0 if not applicable
* @hw_format: hardware format value
* @h_sample: horizontal sample count of plane in 4 * 4 pixel image * @h_sample: horizontal sample count of plane in 4 * 4 pixel image
* @v_sample: vertical sample count of plane in 4 * 4 pixel image * @v_sample: vertical sample count of plane in 4 * 4 pixel image
* @colplanes: number of color planes (1 for packed formats) * @colplanes: number of color planes (1 for packed formats)
...@@ -113,6 +117,7 @@ struct mtk_jpeg_dev { ...@@ -113,6 +117,7 @@ struct mtk_jpeg_dev {
*/ */
struct mtk_jpeg_fmt { struct mtk_jpeg_fmt {
u32 fourcc; u32 fourcc;
u32 hw_format;
int h_sample[VIDEO_MAX_PLANES]; int h_sample[VIDEO_MAX_PLANES];
int v_sample[VIDEO_MAX_PLANES]; int v_sample[VIDEO_MAX_PLANES];
int colplanes; int colplanes;
...@@ -125,10 +130,12 @@ struct mtk_jpeg_fmt { ...@@ -125,10 +130,12 @@ struct mtk_jpeg_fmt {
* mtk_jpeg_q_data - parameters of one queue * mtk_jpeg_q_data - parameters of one queue
* @fmt: driver-specific format of this queue * @fmt: driver-specific format of this queue
* @pix_mp: multiplanar format * @pix_mp: multiplanar format
* @enc_crop_rect: jpeg encoder crop information
*/ */
struct mtk_jpeg_q_data { struct mtk_jpeg_q_data {
struct mtk_jpeg_fmt *fmt; struct mtk_jpeg_fmt *fmt;
struct v4l2_pix_format_mplane pix_mp; struct v4l2_pix_format_mplane pix_mp;
struct v4l2_rect enc_crop_rect;
}; };
/** /**
...@@ -138,6 +145,10 @@ struct mtk_jpeg_q_data { ...@@ -138,6 +145,10 @@ struct mtk_jpeg_q_data {
* @cap_q: destination (capture) queue queue information * @cap_q: destination (capture) queue queue information
* @fh: V4L2 file handle * @fh: V4L2 file handle
* @state: state of the context * @state: state of the context
* @enable_exif: enable exif mode of jpeg encoder
* @enc_quality: jpeg encoder quality
* @restart_interval: jpeg encoder restart interval
* @ctrl_hdl: controls handler
*/ */
struct mtk_jpeg_ctx { struct mtk_jpeg_ctx {
struct mtk_jpeg_dev *jpeg; struct mtk_jpeg_dev *jpeg;
...@@ -145,6 +156,10 @@ struct mtk_jpeg_ctx { ...@@ -145,6 +156,10 @@ struct mtk_jpeg_ctx {
struct mtk_jpeg_q_data cap_q; struct mtk_jpeg_q_data cap_q;
struct v4l2_fh fh; struct v4l2_fh fh;
enum mtk_jpeg_ctx_state state; enum mtk_jpeg_ctx_state state;
bool enable_exif;
u8 enc_quality;
u8 restart_interval;
struct v4l2_ctrl_handler ctrl_hdl;
}; };
#endif /* _MTK_JPEG_CORE_H */ #endif /* _MTK_JPEG_CORE_H */
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2019 MediaTek Inc.
* Author: Xia Jiang <xia.jiang@mediatek.com>
*
*/
#include <linux/io.h>
#include <linux/kernel.h>
#include <media/videobuf2-core.h>
#include <media/videobuf2-dma-contig.h>
#include "mtk_jpeg_enc_hw.h"
static const struct mtk_jpeg_enc_qlt mtk_jpeg_enc_quality[] = {
{.quality_param = 34, .hardware_value = JPEG_ENC_QUALITY_Q34},
{.quality_param = 39, .hardware_value = JPEG_ENC_QUALITY_Q39},
{.quality_param = 48, .hardware_value = JPEG_ENC_QUALITY_Q48},
{.quality_param = 60, .hardware_value = JPEG_ENC_QUALITY_Q60},
{.quality_param = 64, .hardware_value = JPEG_ENC_QUALITY_Q64},
{.quality_param = 68, .hardware_value = JPEG_ENC_QUALITY_Q68},
{.quality_param = 74, .hardware_value = JPEG_ENC_QUALITY_Q74},
{.quality_param = 80, .hardware_value = JPEG_ENC_QUALITY_Q80},
{.quality_param = 82, .hardware_value = JPEG_ENC_QUALITY_Q82},
{.quality_param = 84, .hardware_value = JPEG_ENC_QUALITY_Q84},
{.quality_param = 87, .hardware_value = JPEG_ENC_QUALITY_Q87},
{.quality_param = 90, .hardware_value = JPEG_ENC_QUALITY_Q90},
{.quality_param = 92, .hardware_value = JPEG_ENC_QUALITY_Q92},
{.quality_param = 95, .hardware_value = JPEG_ENC_QUALITY_Q95},
{.quality_param = 97, .hardware_value = JPEG_ENC_QUALITY_Q97},
};
void mtk_jpeg_enc_reset(void __iomem *base)
{
writel(0, base + JPEG_ENC_RSTB);
writel(JPEG_ENC_RESET_BIT, base + JPEG_ENC_RSTB);
writel(0, base + JPEG_ENC_CODEC_SEL);
}
u32 mtk_jpeg_enc_get_file_size(void __iomem *base)
{
return readl(base + JPEG_ENC_DMA_ADDR0) -
readl(base + JPEG_ENC_DST_ADDR0);
}
void mtk_jpeg_enc_start(void __iomem *base)
{
u32 value;
value = readl(base + JPEG_ENC_CTRL);
value |= JPEG_ENC_CTRL_INT_EN_BIT | JPEG_ENC_CTRL_ENABLE_BIT;
writel(value, base + JPEG_ENC_CTRL);
}
void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base,
struct vb2_buffer *src_buf)
{
int i;
dma_addr_t dma_addr;
for (i = 0; i < src_buf->num_planes; i++) {
dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) +
src_buf->planes[i].data_offset;
if (!i)
writel(dma_addr, base + JPEG_ENC_SRC_LUMA_ADDR);
else
writel(dma_addr, base + JPEG_ENC_SRC_CHROMA_ADDR);
}
}
void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base,
struct vb2_buffer *dst_buf)
{
dma_addr_t dma_addr;
size_t size;
u32 dma_addr_offset;
u32 dma_addr_offsetmask;
dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
dma_addr_offset = ctx->enable_exif ? MTK_JPEG_MAX_EXIF_SIZE : 0;
dma_addr_offsetmask = dma_addr & JPEG_ENC_DST_ADDR_OFFSET_MASK;
size = vb2_plane_size(dst_buf, 0);
writel(dma_addr_offset & ~0xf, base + JPEG_ENC_OFFSET_ADDR);
writel(dma_addr_offsetmask & 0xf, base + JPEG_ENC_BYTE_OFFSET_MASK);
writel(dma_addr & ~0xf, base + JPEG_ENC_DST_ADDR0);
writel((dma_addr + size) & ~0xf, base + JPEG_ENC_STALL_ADDR0);
}
void mtk_jpeg_set_enc_params(struct mtk_jpeg_ctx *ctx, void __iomem *base)
{
u32 value;
u32 width = ctx->out_q.enc_crop_rect.width;
u32 height = ctx->out_q.enc_crop_rect.height;
u32 enc_format = ctx->out_q.fmt->fourcc;
u32 bytesperline = ctx->out_q.pix_mp.plane_fmt[0].bytesperline;
u32 blk_num;
u32 img_stride;
u32 mem_stride;
u32 i, enc_quality;
value = width << 16 | height;
writel(value, base + JPEG_ENC_IMG_SIZE);
if (enc_format == V4L2_PIX_FMT_NV12M ||
enc_format == V4L2_PIX_FMT_NV21M)
/*
* Total 8 x 8 block number of luma and chroma.
* The number of blocks is counted from 0.
*/
blk_num = DIV_ROUND_UP(width, 16) *
DIV_ROUND_UP(height, 16) * 6 - 1;
else
blk_num = DIV_ROUND_UP(width, 16) *
DIV_ROUND_UP(height, 8) * 4 - 1;
writel(blk_num, base + JPEG_ENC_BLK_NUM);
if (enc_format == V4L2_PIX_FMT_NV12M ||
enc_format == V4L2_PIX_FMT_NV21M) {
/* 4:2:0 */
img_stride = round_up(width, 16);
mem_stride = bytesperline;
} else {
/* 4:2:2 */
img_stride = round_up(width * 2, 32);
mem_stride = img_stride;
}
writel(img_stride, base + JPEG_ENC_IMG_STRIDE);
writel(mem_stride, base + JPEG_ENC_STRIDE);
enc_quality = mtk_jpeg_enc_quality[0].hardware_value;
for (i = 0; i < ARRAY_SIZE(mtk_jpeg_enc_quality); i++) {
if (ctx->enc_quality <= mtk_jpeg_enc_quality[i].quality_param) {
enc_quality = mtk_jpeg_enc_quality[i].hardware_value;
break;
}
}
writel(enc_quality, base + JPEG_ENC_QUALITY);
value = readl(base + JPEG_ENC_CTRL);
value &= ~JPEG_ENC_CTRL_YUV_FORMAT_MASK;
value |= (ctx->out_q.fmt->hw_format & 3) << 3;
if (ctx->enable_exif)
value |= JPEG_ENC_CTRL_FILE_FORMAT_BIT;
else
value &= ~JPEG_ENC_CTRL_FILE_FORMAT_BIT;
if (ctx->restart_interval)
value |= JPEG_ENC_CTRL_RESTART_EN_BIT;
else
value &= ~JPEG_ENC_CTRL_RESTART_EN_BIT;
writel(value, base + JPEG_ENC_CTRL);
writel(ctx->restart_interval, base + JPEG_ENC_RST_MCU_NUM);
}
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019 MediaTek Inc.
* Author: Xia Jiang <xia.jiang@mediatek.com>
*
*/
#ifndef _MTK_JPEG_ENC_HW_H
#define _MTK_JPEG_ENC_HW_H
#include <media/videobuf2-core.h>
#include "mtk_jpeg_core.h"
#define JPEG_ENC_INT_STATUS_DONE BIT(0)
#define JPEG_ENC_INT_STATUS_MASK_ALLIRQ 0x13
#define JPEG_ENC_DST_ADDR_OFFSET_MASK GENMASK(3, 0)
#define JPEG_ENC_CTRL_YUV_FORMAT_MASK 0x18
#define JPEG_ENC_CTRL_RESTART_EN_BIT BIT(10)
#define JPEG_ENC_CTRL_FILE_FORMAT_BIT BIT(5)
#define JPEG_ENC_CTRL_INT_EN_BIT BIT(2)
#define JPEG_ENC_CTRL_ENABLE_BIT BIT(0)
#define JPEG_ENC_RESET_BIT BIT(0)
#define JPEG_ENC_YUV_FORMAT_YUYV 0
#define JPEG_ENC_YUV_FORMAT_YVYU 1
#define JPEG_ENC_YUV_FORMAT_NV12 2
#define JEPG_ENC_YUV_FORMAT_NV21 3
#define JPEG_ENC_QUALITY_Q60 0x0
#define JPEG_ENC_QUALITY_Q80 0x1
#define JPEG_ENC_QUALITY_Q90 0x2
#define JPEG_ENC_QUALITY_Q95 0x3
#define JPEG_ENC_QUALITY_Q39 0x4
#define JPEG_ENC_QUALITY_Q68 0x5
#define JPEG_ENC_QUALITY_Q84 0x6
#define JPEG_ENC_QUALITY_Q92 0x7
#define JPEG_ENC_QUALITY_Q48 0x8
#define JPEG_ENC_QUALITY_Q74 0xa
#define JPEG_ENC_QUALITY_Q87 0xb
#define JPEG_ENC_QUALITY_Q34 0xc
#define JPEG_ENC_QUALITY_Q64 0xe
#define JPEG_ENC_QUALITY_Q82 0xf
#define JPEG_ENC_QUALITY_Q97 0x10
#define JPEG_ENC_RSTB 0x100
#define JPEG_ENC_CTRL 0x104
#define JPEG_ENC_QUALITY 0x108
#define JPEG_ENC_BLK_NUM 0x10C
#define JPEG_ENC_BLK_CNT 0x110
#define JPEG_ENC_INT_STS 0x11c
#define JPEG_ENC_DST_ADDR0 0x120
#define JPEG_ENC_DMA_ADDR0 0x124
#define JPEG_ENC_STALL_ADDR0 0x128
#define JPEG_ENC_OFFSET_ADDR 0x138
#define JPEG_ENC_RST_MCU_NUM 0x150
#define JPEG_ENC_IMG_SIZE 0x154
#define JPEG_ENC_DEBUG_INFO0 0x160
#define JPEG_ENC_DEBUG_INFO1 0x164
#define JPEG_ENC_TOTAL_CYCLE 0x168
#define JPEG_ENC_BYTE_OFFSET_MASK 0x16c
#define JPEG_ENC_SRC_LUMA_ADDR 0x170
#define JPEG_ENC_SRC_CHROMA_ADDR 0x174
#define JPEG_ENC_STRIDE 0x178
#define JPEG_ENC_IMG_STRIDE 0x17c
#define JPEG_ENC_DCM_CTRL 0x300
#define JPEG_ENC_CODEC_SEL 0x314
#define JPEG_ENC_ULTRA_THRES 0x318
/**
* struct mtk_jpeg_enc_qlt - JPEG encoder quality data
* @quality_param: quality value
* @hardware_value: hardware value of quality
*/
struct mtk_jpeg_enc_qlt {
u8 quality_param;
u8 hardware_value;
};
void mtk_jpeg_enc_reset(void __iomem *base);
u32 mtk_jpeg_enc_get_file_size(void __iomem *base);
void mtk_jpeg_enc_start(void __iomem *enc_reg_base);
void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base,
struct vb2_buffer *src_buf);
void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base,
struct vb2_buffer *dst_buf);
void mtk_jpeg_set_enc_params(struct mtk_jpeg_ctx *ctx, void __iomem *base);
#endif /* _MTK_JPEG_ENC_HW_H */
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