Commit 4632bec9 authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher

drm/amdgpu/mes12: update data cache boundary

Enlarge the data cache boundary.

v2: use the fix data cache boundary.
Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 46c47666
...@@ -685,8 +685,8 @@ static int mes_v12_0_load_microcode(struct amdgpu_device *adev, ...@@ -685,8 +685,8 @@ static int mes_v12_0_load_microcode(struct amdgpu_device *adev,
WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI, WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI,
upper_32_bits(adev->mes.data_fw_gpu_addr[pipe])); upper_32_bits(adev->mes.data_fw_gpu_addr[pipe]));
/* Set 0x3FFFF (256K-1) to CP_MES_MDBOUND_LO */ /* Set data cache boundary CP_MES_MDBOUND_LO */
WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x3FFFF); WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF);
if (prime_icache) { if (prime_icache) {
/* invalidate ICACHE */ /* invalidate ICACHE */
......
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