Commit 46cf5f76 authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: make sure to never allocate PDs/PTs for invalidations

Make sure that we never allocate a page table for an invalidation operation.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 55cdd4e9
......@@ -1442,15 +1442,15 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
uint64_t incr, entry_end, pe_start;
struct amdgpu_bo *pt;
/* make sure that the page tables covering the address range are
* actually allocated
*/
r = amdgpu_vm_alloc_pts(params->adev, params->vm, &cursor,
params->direct);
if (r)
return r;
pt = cursor.entry->base.bo;
if (flags & AMDGPU_PTE_VALID) {
/* make sure that the page tables covering the
* address range are actually allocated
*/
r = amdgpu_vm_alloc_pts(params->adev, params->vm,
&cursor, params->direct);
if (r)
return r;
}
shift = amdgpu_vm_level_shift(adev, cursor.level);
parent_shift = amdgpu_vm_level_shift(adev, cursor.level - 1);
......@@ -1479,6 +1479,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
continue;
}
pt = cursor.entry->base.bo;
if (!pt)
return -ENOENT;
/* Looks good so far, calculate parameters for the update */
incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift;
mask = amdgpu_vm_entries_mask(adev, cursor.level);
......
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