Commit 47c6f8a6 authored by Tudor Ambarus's avatar Tudor Ambarus

mtd: spi-nor: Do not change nor->addr_nbytes at SFDP parsing time

At the SFDP parsing time we should not change members of struct spi_nor,
but instead fill members of struct spi_nor_flash_parameters which could
later on be used by callers. The caller will then decide if SFDP params
should be used and more importantly when they should be used. Clean the
code flow and don't initialize nor->addr_nbytes at SFDP parsing time.
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: default avatarTakahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarPratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220725092505.446315-4-tudor.ambarus@microchip.com
parent aa5d980a
......@@ -2251,8 +2251,8 @@ static int spi_nor_default_setup(struct spi_nor *nor,
static int spi_nor_set_addr_nbytes(struct spi_nor *nor)
{
if (nor->addr_nbytes) {
/* already configured from SFDP */
if (nor->params->addr_nbytes) {
nor->addr_nbytes = nor->params->addr_nbytes;
} else if (nor->read_proto == SNOR_PROTO_8_8_8_DTR) {
/*
* In 8D-8D-8D mode, one byte takes half a cycle to transfer. So
......@@ -2492,7 +2492,6 @@ static void spi_nor_sfdp_init_params_deprecated(struct spi_nor *nor)
if (spi_nor_parse_sfdp(nor)) {
memcpy(nor->params, &sfdp_params, sizeof(*nor->params));
nor->addr_nbytes = 0;
nor->flags &= ~SNOR_F_4B_OPCODES;
}
}
......
......@@ -340,6 +340,7 @@ struct spi_nor_otp {
* @writesize Minimal writable flash unit size. Defaults to 1. Set to
* ECC unit size for ECC-ed flashes.
* @page_size: the page size of the SPI NOR flash memory.
* @addr_nbytes: number of address bytes to send.
* @rdsr_dummy: dummy cycles needed for Read Status Register command
* in octal DTR mode.
* @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
......@@ -372,6 +373,7 @@ struct spi_nor_flash_parameter {
u64 size;
u32 writesize;
u32 page_size;
u8 addr_nbytes;
u8 rdsr_dummy;
u8 rdsr_addr_nbytes;
......
......@@ -20,7 +20,7 @@ is25lp256_post_bfpt_fixups(struct spi_nor *nor,
*/
if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
nor->addr_nbytes = 4;
nor->params->addr_nbytes = 4;
return 0;
}
......
......@@ -462,11 +462,11 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
nor->addr_nbytes = 3;
params->addr_nbytes = 3;
break;
case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
nor->addr_nbytes = 4;
params->addr_nbytes = 4;
break;
default:
......@@ -653,7 +653,7 @@ static u8 spi_nor_smpt_addr_nbytes(const struct spi_nor *nor, const u32 settings
return 4;
case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:
default:
return nor->addr_nbytes;
return nor->params->addr_nbytes;
}
}
......@@ -1098,7 +1098,7 @@ static int spi_nor_parse_4bait(struct spi_nor *nor,
* Spansion memory. However this quirk is no longer needed with new
* SFDP compliant memories.
*/
nor->addr_nbytes = 4;
params->addr_nbytes = 4;
nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;
/* fall through */
......
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