Commit 485863b8 authored by Shawn Guo's avatar Shawn Guo

ARM: imx: mask gpc interrupts initially

Mask gpc interrupts initially to avoid suspicious interrupts.
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent eea8e326
...@@ -101,11 +101,16 @@ static void imx_gpc_irq_mask(struct irq_data *d) ...@@ -101,11 +101,16 @@ static void imx_gpc_irq_mask(struct irq_data *d)
void __init imx_gpc_init(void) void __init imx_gpc_init(void)
{ {
struct device_node *np; struct device_node *np;
int i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpc"); np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpc");
gpc_base = of_iomap(np, 0); gpc_base = of_iomap(np, 0);
WARN_ON(!gpc_base); WARN_ON(!gpc_base);
/* Initially mask all interrupts */
for (i = 0; i < IMR_NUM; i++)
writel_relaxed(~0, gpc_base + GPC_IMR1 + i * 4);
/* Register GPC as the secondary interrupt controller behind GIC */ /* Register GPC as the secondary interrupt controller behind GIC */
gic_arch_extn.irq_mask = imx_gpc_irq_mask; gic_arch_extn.irq_mask = imx_gpc_irq_mask;
gic_arch_extn.irq_unmask = imx_gpc_irq_unmask; gic_arch_extn.irq_unmask = imx_gpc_irq_unmask;
......
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