Commit 4896c733 authored by Josh Wu's avatar Josh Wu Committed by Nicolas Ferre

ARM: at91/dt: sama5d4: add usart0, usart1 dt nodes

Also add the pinctrl for usart0, usart1.
Signed-off-by: default avatarJosh Wu <josh.wu@atmel.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 7107bb0b
...@@ -59,6 +59,8 @@ aliases { ...@@ -59,6 +59,8 @@ aliases {
serial0 = &usart3; serial0 = &usart3;
serial1 = &usart4; serial1 = &usart4;
serial2 = &usart2; serial2 = &usart2;
serial3 = &usart0;
serial4 = &usart1;
gpio0 = &pioA; gpio0 = &pioA;
gpio1 = &pioB; gpio1 = &pioB;
gpio2 = &pioC; gpio2 = &pioC;
...@@ -977,6 +979,42 @@ sfr: sfr@f8028000 { ...@@ -977,6 +979,42 @@ sfr: sfr@f8028000 {
reg = <0xf8028000 0x60>; reg = <0xf8028000 0x60>;
}; };
usart0: serial@f802c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf802c000 0x100>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(36))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(37))>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
clocks = <&usart0_clk>;
clock-names = "usart";
status = "disabled";
};
usart1: serial@f8030000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8030000 0x100>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(38))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(39))>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
clocks = <&usart1_clk>;
clock-names = "usart";
status = "disabled";
};
mmc1: mmc@fc000000 { mmc1: mmc@fc000000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xfc000000 0x600>; reg = <0xfc000000 0x600>;
...@@ -1623,6 +1661,36 @@ AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */ ...@@ -1623,6 +1661,36 @@ AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
}; };
}; };
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
>;
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
>;
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
usart2 { usart2 {
pinctrl_usart2: usart2-0 { pinctrl_usart2: usart2-0 {
atmel,pins = atmel,pins =
......
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