Commit 48f2c1ae authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: mite: do mite_steup() as part of mite_attach()

Currently all the drivers that use the mite driver have to call
mite_setup() after allocating and initializing the mite device
with mite_attach().

Move the mite_setup() call into mite_attach() to simplify the
drivers a bit and remove the need for the additional inline and
exported functions.

For aesthetics, move mite_setup2(), and rename it to mite_setup(),
so it's near mite_attach().
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5b329305
......@@ -245,82 +245,6 @@ static unsigned int mite_fifo_size(struct mite *mite, unsigned int channel)
return empty_count + full_count;
}
int mite_setup2(struct comedi_device *dev,
struct mite *mite, bool use_win1)
{
resource_size_t daq_phys_addr;
unsigned long length;
int i;
u32 csigr_bits;
unsigned int unknown_dma_burst_bits;
pci_set_master(mite->pcidev);
mite->mmio = pci_ioremap_bar(mite->pcidev, 0);
if (!mite->mmio) {
dev_err(dev->class_dev,
"Failed to remap mite io memory address\n");
return -ENOMEM;
}
dev->mmio = pci_ioremap_bar(mite->pcidev, 1);
if (!dev->mmio) {
dev_err(dev->class_dev,
"Failed to remap daq io memory address\n");
return -ENOMEM;
}
daq_phys_addr = pci_resource_start(mite->pcidev, 1);
length = pci_resource_len(mite->pcidev, 1);
if (use_win1) {
writel(0, mite->mmio + MITE_IODWBSR);
dev_info(dev->class_dev,
"using I/O Window Base Size register 1\n");
writel(daq_phys_addr | WENAB |
MITE_IODWBSR_1_WSIZE_bits(length),
mite->mmio + MITE_IODWBSR_1);
writel(0, mite->mmio + MITE_IODWCR_1);
} else {
writel(daq_phys_addr | WENAB, mite->mmio + MITE_IODWBSR);
}
/*
* Make sure dma bursts work. I got this from running a bus analyzer
* on a pxi-6281 and a pxi-6713. 6713 powered up with register value
* of 0x61f and bursts worked. 6281 powered up with register value of
* 0x1f and bursts didn't work. The NI windows driver reads the
* register, then does a bitwise-or of 0x600 with it and writes it back.
*
* The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be
* written and read back. The bits 0x1f always read as 1.
* The rest always read as zero.
*/
unknown_dma_burst_bits = readl(mite->mmio + MITE_UNKNOWN_DMA_BURST_REG);
unknown_dma_burst_bits |= UNKNOWN_DMA_BURST_ENABLE_BITS;
writel(unknown_dma_burst_bits, mite->mmio + MITE_UNKNOWN_DMA_BURST_REG);
csigr_bits = readl(mite->mmio + MITE_CSIGR);
mite->num_channels = CSIGR_TO_DMAC(csigr_bits);
if (mite->num_channels > MAX_MITE_DMA_CHANNELS) {
dev_warn(dev->class_dev,
"mite: bug? chip claims to have %i dma channels. Setting to %i.\n",
mite->num_channels, MAX_MITE_DMA_CHANNELS);
mite->num_channels = MAX_MITE_DMA_CHANNELS;
}
dump_chip_signature(csigr_bits);
for (i = 0; i < mite->num_channels; i++) {
writel(CHOR_DMARESET, mite->mmio + MITE_CHOR(i));
/* disable interrupts */
writel(CHCR_CLR_DMA_IE | CHCR_CLR_LINKP_IE | CHCR_CLR_SAR_IE |
CHCR_CLR_DONE_IE | CHCR_CLR_MRDY_IE | CHCR_CLR_DRDY_IE |
CHCR_CLR_LC_IE | CHCR_CLR_CONT_RB_IE,
mite->mmio + MITE_CHCR(i));
}
mite->fifo_size = mite_fifo_size(mite, 0);
dev_info(dev->class_dev, "fifo size is %i.\n", mite->fifo_size);
return 0;
}
EXPORT_SYMBOL_GPL(mite_setup2);
struct mite_ring *mite_alloc_ring(struct mite *mite)
{
struct mite_ring *ring;
......@@ -807,31 +731,118 @@ int mite_done(struct mite_channel *mite_chan)
}
EXPORT_SYMBOL_GPL(mite_done);
static int mite_setup(struct comedi_device *dev, struct mite *mite,
bool use_win1)
{
resource_size_t daq_phys_addr;
unsigned long length;
int i;
u32 csigr_bits;
unsigned int unknown_dma_burst_bits;
pci_set_master(mite->pcidev);
mite->mmio = pci_ioremap_bar(mite->pcidev, 0);
if (!mite->mmio) {
dev_err(dev->class_dev,
"Failed to remap mite io memory address\n");
return -ENOMEM;
}
dev->mmio = pci_ioremap_bar(mite->pcidev, 1);
if (!dev->mmio) {
dev_err(dev->class_dev,
"Failed to remap daq io memory address\n");
return -ENOMEM;
}
daq_phys_addr = pci_resource_start(mite->pcidev, 1);
length = pci_resource_len(mite->pcidev, 1);
if (use_win1) {
writel(0, mite->mmio + MITE_IODWBSR);
dev_info(dev->class_dev,
"using I/O Window Base Size register 1\n");
writel(daq_phys_addr | WENAB |
MITE_IODWBSR_1_WSIZE_bits(length),
mite->mmio + MITE_IODWBSR_1);
writel(0, mite->mmio + MITE_IODWCR_1);
} else {
writel(daq_phys_addr | WENAB, mite->mmio + MITE_IODWBSR);
}
/*
* Make sure dma bursts work. I got this from running a bus analyzer
* on a pxi-6281 and a pxi-6713. 6713 powered up with register value
* of 0x61f and bursts worked. 6281 powered up with register value of
* 0x1f and bursts didn't work. The NI windows driver reads the
* register, then does a bitwise-or of 0x600 with it and writes it back.
*
* The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be
* written and read back. The bits 0x1f always read as 1.
* The rest always read as zero.
*/
unknown_dma_burst_bits = readl(mite->mmio + MITE_UNKNOWN_DMA_BURST_REG);
unknown_dma_burst_bits |= UNKNOWN_DMA_BURST_ENABLE_BITS;
writel(unknown_dma_burst_bits, mite->mmio + MITE_UNKNOWN_DMA_BURST_REG);
csigr_bits = readl(mite->mmio + MITE_CSIGR);
mite->num_channels = CSIGR_TO_DMAC(csigr_bits);
if (mite->num_channels > MAX_MITE_DMA_CHANNELS) {
dev_warn(dev->class_dev,
"mite: bug? chip claims to have %i dma channels. Setting to %i.\n",
mite->num_channels, MAX_MITE_DMA_CHANNELS);
mite->num_channels = MAX_MITE_DMA_CHANNELS;
}
dump_chip_signature(csigr_bits);
for (i = 0; i < mite->num_channels; i++) {
writel(CHOR_DMARESET, mite->mmio + MITE_CHOR(i));
/* disable interrupts */
writel(CHCR_CLR_DMA_IE | CHCR_CLR_LINKP_IE | CHCR_CLR_SAR_IE |
CHCR_CLR_DONE_IE | CHCR_CLR_MRDY_IE | CHCR_CLR_DRDY_IE |
CHCR_CLR_LC_IE | CHCR_CLR_CONT_RB_IE,
mite->mmio + MITE_CHCR(i));
}
mite->fifo_size = mite_fifo_size(mite, 0);
dev_info(dev->class_dev, "fifo size is %i.\n", mite->fifo_size);
return 0;
}
/**
* mite_attach() - Allocate and initialize a MITE device for a comedi driver.
* @dev: COMEDI device.
* @use_win1: flag to use I/O Window 1 instead of I/O Window 0.
*
* Called by a COMEDI drivers (*auto_attach).
*
* Returns a pointer to the MITE device on success, or NULL if the MITE cannot
* be allocated.
* be allocated or remapped.
*/
struct mite *mite_attach(struct comedi_device *dev)
struct mite *mite_attach(struct comedi_device *dev, bool use_win1)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct mite *mite;
unsigned int i;
int ret;
mite = kzalloc(sizeof(*mite), GFP_KERNEL);
if (mite) {
spin_lock_init(&mite->lock);
mite->pcidev = pcidev;
for (i = 0; i < MAX_MITE_DMA_CHANNELS; ++i) {
mite->channels[i].mite = mite;
mite->channels[i].channel = i;
mite->channels[i].done = 1;
}
if (!mite)
return NULL;
spin_lock_init(&mite->lock);
mite->pcidev = pcidev;
for (i = 0; i < MAX_MITE_DMA_CHANNELS; ++i) {
mite->channels[i].mite = mite;
mite->channels[i].channel = i;
mite->channels[i].done = 1;
}
ret = mite_setup(dev, mite, use_win1);
if (ret) {
if (mite->mmio)
iounmap(mite->mmio);
kfree(mite);
return NULL;
}
return mite;
}
EXPORT_SYMBOL_GPL(mite_attach);
......
......@@ -60,14 +60,6 @@ struct mite {
spinlock_t lock;
};
int mite_setup2(struct comedi_device *, struct mite *, bool use_win1);
static inline int mite_setup(struct comedi_device *dev,
struct mite *mite)
{
return mite_setup2(dev, mite, false);
}
struct mite_ring *mite_alloc_ring(struct mite *);
void mite_free_ring(struct mite_ring *ring);
struct mite_channel *mite_request_channel_in_range(struct mite *,
......@@ -98,7 +90,7 @@ int mite_buf_change(struct mite_ring *, struct comedi_subdevice *);
int mite_init_ring_descriptors(struct mite_ring *, struct comedi_subdevice *,
unsigned int nbytes);
struct mite *mite_attach(struct comedi_device *);
struct mite *mite_attach(struct comedi_device *, bool use_win1);
void mite_detach(struct mite *);
/*
......
......@@ -724,14 +724,10 @@ static int ni_660x_auto_attach(struct comedi_device *dev,
return ret;
devpriv = dev->private;
devpriv->mite = mite_attach(dev);
devpriv->mite = mite_attach(dev, true); /* use win1 */
if (!devpriv->mite)
return -ENOMEM;
ret = mite_setup2(dev, devpriv->mite, true);
if (ret < 0)
return ret;
ret = ni_660x_alloc_mite_rings(dev);
if (ret < 0)
return ret;
......
......@@ -897,14 +897,10 @@ static int nidio_auto_attach(struct comedi_device *dev,
spin_lock_init(&devpriv->mite_channel_lock);
devpriv->mite = mite_attach(dev);
devpriv->mite = mite_attach(dev, false); /* use win0 */
if (!devpriv->mite)
return -ENOMEM;
ret = mite_setup(dev, devpriv->mite);
if (ret < 0)
return ret;
devpriv->di_mite_ring = mite_alloc_ring(devpriv->mite);
if (!devpriv->di_mite_ring)
return -ENOMEM;
......
......@@ -1172,7 +1172,7 @@ static int pcimio_auto_attach(struct comedi_device *dev,
return ret;
devpriv = dev->private;
devpriv->mite = mite_attach(dev);
devpriv->mite = mite_attach(dev, false); /* use win0 */
if (!devpriv->mite)
return -ENOMEM;
......@@ -1197,10 +1197,6 @@ static int pcimio_auto_attach(struct comedi_device *dev,
if (board->reg_type == ni_reg_6713)
devpriv->is_6713 = 1;
ret = mite_setup(dev, devpriv->mite);
if (ret < 0)
return ret;
devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite);
if (!devpriv->ai_mite_ring)
return -ENOMEM;
......
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