Commit 4939788e authored by Ralf Baechle's avatar Ralf Baechle

MIPS: Spelling fix lets -> let's

As noticed by Sergei in the discussion of Andrea Gelmini's patch series.
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Reported-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
parent a320a115
...@@ -100,7 +100,7 @@ typedef volatile struct au1xxx_ddma_desc { ...@@ -100,7 +100,7 @@ typedef volatile struct au1xxx_ddma_desc {
u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
/* /*
* First 32 bytes are HW specific!!! * First 32 bytes are HW specific!!!
* Lets have some SW data following -- make sure it's 32 bytes. * Let's have some SW data following -- make sure it's 32 bytes.
*/ */
u32 sw_status; u32 sw_status;
u32 sw_context; u32 sw_context;
......
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
/* /*
* during early_printk no ioremap possible at this early stage * during early_printk no ioremap possible at this early stage
* lets use KSEG1 instead * let's use KSEG1 instead
*/ */
#define LTQ_ASC0_BASE_ADDR 0x1E100C00 #define LTQ_ASC0_BASE_ADDR 0x1E100C00
#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC0_BASE_ADDR) #define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC0_BASE_ADDR)
......
...@@ -75,7 +75,7 @@ extern __iomem void *ltq_cgu_membase; ...@@ -75,7 +75,7 @@ extern __iomem void *ltq_cgu_membase;
/* /*
* during early_printk no ioremap is possible * during early_printk no ioremap is possible
* lets use KSEG1 instead * let's use KSEG1 instead
*/ */
#define LTQ_ASC1_BASE_ADDR 0x1E100C00 #define LTQ_ASC1_BASE_ADDR 0x1E100C00
#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR) #define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
......
...@@ -481,7 +481,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, ...@@ -481,7 +481,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
/* /*
* OK we are here either because we hit a NAL * OK we are here either because we hit a NAL
* instruction or because we are emulating an * instruction or because we are emulating an
* old bltzal{,l} one. Lets figure out what the * old bltzal{,l} one. Let's figure out what the
* case really is. * case really is.
*/ */
if (!insn.i_format.rs) { if (!insn.i_format.rs) {
...@@ -515,7 +515,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, ...@@ -515,7 +515,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
/* /*
* OK we are here either because we hit a BAL * OK we are here either because we hit a BAL
* instruction or because we are emulating an * instruction or because we are emulating an
* old bgezal{,l} one. Lets figure out what the * old bgezal{,l} one. Let's figure out what the
* case really is. * case really is.
*/ */
if (!insn.i_format.rs) { if (!insn.i_format.rs) {
......
...@@ -88,7 +88,7 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf, ...@@ -88,7 +88,7 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags; flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
/* Lets see if this is an O32 ELF */ /* Let's see if this is an O32 ELF */
if (elf32) { if (elf32) {
if (flags & EF_MIPS_FP64) { if (flags & EF_MIPS_FP64) {
/* /*
......
...@@ -2202,7 +2202,7 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) ...@@ -2202,7 +2202,7 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31)
} }
/* /*
* Lets not return to userland just yet. It's costly and * Let's not return to userland just yet. It's costly and
* it's likely we have more R2 instructions to emulate * it's likely we have more R2 instructions to emulate
*/ */
if (!err && (pass++ < MIPS_R2_EMUL_TOTAL_PASS)) { if (!err && (pass++ < MIPS_R2_EMUL_TOTAL_PASS)) {
......
...@@ -23,7 +23,7 @@ typedef unsigned long machreg_t; ...@@ -23,7 +23,7 @@ typedef unsigned long machreg_t;
static arch_spinlock_t nmi_lock = __ARCH_SPIN_LOCK_UNLOCKED; static arch_spinlock_t nmi_lock = __ARCH_SPIN_LOCK_UNLOCKED;
/* /*
* Lets see what else we need to do here. Set up sp, gp? * Let's see what else we need to do here. Set up sp, gp?
*/ */
void nmi_dump(void) void nmi_dump(void)
{ {
......
...@@ -67,7 +67,7 @@ static int xbow_probe(nasid_t nasid) ...@@ -67,7 +67,7 @@ static int xbow_probe(nasid_t nasid)
return -ENODEV; return -ENODEV;
/* /*
* Okay, here's a xbow. Lets arbitrate and find * Okay, here's a xbow. Let's arbitrate and find
* out if we should initialize it. Set enabled * out if we should initialize it. Set enabled
* hub connected at highest or lowest widget as * hub connected at highest or lowest widget as
* master. * master.
......
...@@ -263,7 +263,7 @@ void sni_rm200_mask_and_ack_8259A(struct irq_data *d) ...@@ -263,7 +263,7 @@ void sni_rm200_mask_and_ack_8259A(struct irq_data *d)
static int spurious_irq_mask; static int spurious_irq_mask;
/* /*
* At this point we can be sure the IRQ is spurious, * At this point we can be sure the IRQ is spurious,
* lets ACK and report it. [once per IRQ] * let's ACK and report it. [once per IRQ]
*/ */
if (!(spurious_irq_mask & irqmask)) { if (!(spurious_irq_mask & irqmask)) {
printk(KERN_DEBUG printk(KERN_DEBUG
......
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