Commit 49e93898 authored by Marek Behún's avatar Marek Behún Committed by Gregory CLEMENT

ARM: dts: turris-omnia: Fix mpp26 pin name and comment

There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.

Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.

Fixes: 26ca8b52 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 568035b0
...@@ -476,7 +476,7 @@ spi0cs0_pins: spi0cs0-pins { ...@@ -476,7 +476,7 @@ spi0cs0_pins: spi0cs0-pins {
marvell,function = "spi0"; marvell,function = "spi0";
}; };
spi0cs1_pins: spi0cs1-pins { spi0cs2_pins: spi0cs2-pins {
marvell,pins = "mpp26"; marvell,pins = "mpp26";
marvell,function = "spi0"; marvell,function = "spi0";
}; };
...@@ -511,7 +511,7 @@ partition@100000 { ...@@ -511,7 +511,7 @@ partition@100000 {
}; };
}; };
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */ /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
}; };
&uart0 { &uart0 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment