Commit 49eb5926 authored by Carlo Caione's avatar Carlo Caione Committed by Arnd Bergmann

ARM: meson6: DTS: Fix wrong reg mapping and IRQ numbers

The DTS erronously uses the wrong reg mapping and IRQ numbers for some
UART, WDT and timer nodes. Fix this.
Reported-by: default avatarJohn Wehle <john@feith.com>
Signed-off-by: default avatarCarlo Caione <carlo@endlessm.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent e9e50f10
......@@ -67,7 +67,7 @@ gic: interrupt-controller@c4301000 {
timer@c1109940 {
compatible = "amlogic,meson6-timer";
reg = <0xc1109940 0x14>;
reg = <0xc1109940 0x18>;
interrupts = <0 10 1>;
};
......@@ -80,36 +80,37 @@ soc {
wdt: watchdog@c1109900 {
compatible = "amlogic,meson6-wdt";
reg = <0xc1109900 0x8>;
interrupts = <0 0 1>;
};
uart_AO: serial@c81004c0 {
compatible = "amlogic,meson-uart";
reg = <0xc81004c0 0x14>;
reg = <0xc81004c0 0x18>;
interrupts = <0 90 1>;
clocks = <&clk81>;
status = "disabled";
};
uart_A: serial@c81084c0 {
uart_A: serial@c11084c0 {
compatible = "amlogic,meson-uart";
reg = <0xc81084c0 0x14>;
interrupts = <0 90 1>;
reg = <0xc11084c0 0x18>;
interrupts = <0 26 1>;
clocks = <&clk81>;
status = "disabled";
};
uart_B: serial@c81084dc {
uart_B: serial@c11084dc {
compatible = "amlogic,meson-uart";
reg = <0xc81084dc 0x14>;
interrupts = <0 90 1>;
reg = <0xc11084dc 0x18>;
interrupts = <0 75 1>;
clocks = <&clk81>;
status = "disabled";
};
uart_C: serial@c8108700 {
uart_C: serial@c1108700 {
compatible = "amlogic,meson-uart";
reg = <0xc8108700 0x14>;
interrupts = <0 90 1>;
reg = <0xc1108700 0x18>;
interrupts = <0 93 1>;
clocks = <&clk81>;
status = "disabled";
};
......
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