Commit 4a3ef226 authored by Gwenhael Goavec-Merou's avatar Gwenhael Goavec-Merou Committed by Sascha Hauer

ARM: imx27: clk-imx27: SPI: Rename IPG clock and add PER clock

spi-imx driver needs two clock: ipg and per. The first clock must be named and
the second must be added.
Signed-off-by: default avatarGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 88b62b91
...@@ -228,9 +228,12 @@ int __init mx27_clocks_init(unsigned long fref) ...@@ -228,9 +228,12 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1"); clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2"); clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2"); clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0"); clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.0");
clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1"); clk_register_clkdev(clk[cspi1_ipg_gate], "ipg", "imx27-cspi.0");
clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2"); clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.1");
clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx27-cspi.1");
clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.2");
clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx27-cspi.2");
clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0"); clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0"); clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
......
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