Commit 4a65163e authored by Sonic Zhang's avatar Sonic Zhang Committed by Ben Dooks

i2c-bfin-twi: abort transfer is MEM bit is reset unexpectedly

Sometimes, the first I2C transmit interrupt is not serviced in time (like
when higher priority interrupts take too long).  Since the RESTART bit is
not set before the next I2C clock, when the TWI handler is finally called,
the I2C session is aborted (MEM bit is reset) and both SMITSERV and MCOMP
int status bits are set.

So when this happens, abort the transfer.
Reported-by: default avatarIsabelle Leonardi <i.leonardi@detracom.fr>
Signed-off-by: default avatarSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent af4087e0
...@@ -193,7 +193,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface, ...@@ -193,7 +193,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
return; return;
} }
if (twi_int_status & MCOMP) { if (twi_int_status & MCOMP) {
if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { if ((read_MASTER_CTL(iface) & MEN) == 0 &&
(iface->cur_mode == TWI_I2C_MODE_REPEAT ||
iface->cur_mode == TWI_I2C_MODE_COMBINED)) {
iface->result = -1;
write_INT_MASK(iface, 0);
write_MASTER_CTL(iface, 0);
} else if (iface->cur_mode == TWI_I2C_MODE_COMBINED) {
if (iface->readNum == 0) { if (iface->readNum == 0) {
/* set the read number to 1 and ask for manual /* set the read number to 1 and ask for manual
* stop in block combine mode * stop in block combine mode
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment