Commit 4a95772d authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Linus Torvalds

[PATCH] Lock initializer cleanup - (ALPHA)

Use the new lock initializers DEFINE_SPIN_LOCK and DEFINE_RW_LOCK
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 176b50ec
......@@ -22,7 +22,7 @@
/* Note mask bit is true for DISABLED irqs. */
static unsigned int cached_irq_mask = 0xffff;
static spinlock_t i8259_irq_lock = SPIN_LOCK_UNLOCKED;
static DEFINE_SPINLOCK(i8259_irq_lock);
static inline void
i8259_update_irq_hw(unsigned int irq, unsigned long mask)
......
......@@ -15,7 +15,7 @@
* at the same time in multiple CPUs? To be safe I added a spinlock
* but it can be removed trivially if the palcode is robust against smp.
*/
spinlock_t srm_irq_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(srm_irq_lock);
static inline void
srm_enable_irq(unsigned int irq)
......
......@@ -1104,7 +1104,7 @@ static int SMC37c669_xlate_drq(
int drq
);
static spinlock_t smc_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;
static __cacheline_aligned DEFINE_SPINLOCK(smc_lock);
/*
**++
......
......@@ -22,7 +22,7 @@
#include <asm/uaccess.h>
static spinlock_t srmcons_callback_lock = SPIN_LOCK_UNLOCKED;
static DEFINE_SPINLOCK(srmcons_callback_lock);
static int srm_is_registered_console = 0;
/*
......@@ -160,7 +160,7 @@ static int
srmcons_get_private_struct(struct srmcons_private **ps)
{
static struct srmcons_private *srmconsp = NULL;
static spinlock_t srmconsp_lock = SPIN_LOCK_UNLOCKED;
static DEFINE_SPINLOCK(srmconsp_lock);
unsigned long flags;
int retval = 0;
......
......@@ -43,7 +43,7 @@ static unsigned long cached_irq_mask;
/* dp264 boards handle at max four CPUs */
static unsigned long cpu_irq_affinity[4] = { 0UL, 0UL, 0UL, 0UL };
spinlock_t dp264_irq_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(dp264_irq_lock);
static void
tsunami_update_irq_hw(unsigned long mask)
......
......@@ -42,7 +42,7 @@ static unsigned int hose_irq_masks[4] = {
0xff0000, 0xfe0000, 0xff0000, 0xff0000
};
static unsigned int cached_irq_masks[4];
spinlock_t rawhide_irq_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(rawhide_irq_lock);
static inline void
rawhide_update_irq_hw(int hose, int mask)
......
......@@ -31,7 +31,7 @@
#include "pci_impl.h"
#include "machvec_impl.h"
spinlock_t sable_lynx_irq_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(sable_lynx_irq_lock);
typedef struct irq_swizzle_struct
{
......
......@@ -56,7 +56,7 @@ static unsigned long titan_cached_irq_mask;
/*
* Need SMP-safe access to interrupt CSRs
*/
spinlock_t titan_irq_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(titan_irq_lock);
static void
titan_update_irq_hw(unsigned long mask)
......
......@@ -32,7 +32,7 @@
static unsigned long cached_irq_mask[WILDFIRE_NR_IRQS/(sizeof(long)*8)];
spinlock_t wildfire_irq_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(wildfire_irq_lock);
static int doing_init_irq_hw = 0;
......
......@@ -63,7 +63,7 @@ extern unsigned long wall_jiffies; /* kernel/timer.c */
static int set_rtc_mmss(unsigned long);
spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(rtc_lock);
#define TICK_SIZE (tick_nsec / 1000)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment