Commit 4aa6c99d authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Stephen Boyd

clk: mvebu: armada-37xx-periph: Fix the clock gate flag

For the gate part of the peripheral clock setting the bit disables the
clock and clearing it enables the clock. This is not the default behavior
of clk_gate component, so we need to use the CLK_GATE_SET_TO_DISABLE flag.
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Fixes: 8ca4746a ("clk: mvebu: Add the peripheral clock driver for Armada 3700")
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent c4e634ce
...@@ -329,6 +329,7 @@ static int armada_3700_add_composite_clk(const struct clk_periph_data *data, ...@@ -329,6 +329,7 @@ static int armada_3700_add_composite_clk(const struct clk_periph_data *data,
gate->lock = lock; gate->lock = lock;
gate_ops = gate_hw->init->ops; gate_ops = gate_hw->init->ops;
gate->reg = reg + (u64)gate->reg; gate->reg = reg + (u64)gate->reg;
gate->flags = CLK_GATE_SET_TO_DISABLE;
} }
if (data->rate_hw) { if (data->rate_hw) {
......
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