drm/i915: move PCH DP AUX CH regs to intel_dp_aux_regs.h

Move the macros where they belong.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9bc3a7bb34edc5dc17ffcb2a9e64edcef8c7a7b8.1716894910.git.jani.nikula@intel.comSigned-off-by: Jani Nikula <jani.nikula@intel.com>

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

@@ -28,6 +28,10 @@
 #define VLV_DP_AUX_CH_CTL(aux_ch)	_MMIO(VLV_DISPLAY_BASE + \
 					      _PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL))
 
+#define _PCH_DPB_AUX_CH_CTL		0xe4110
+#define _PCH_DPC_AUX_CH_CTL		0xe4210
+#define PCH_DP_AUX_CH_CTL(aux_ch)	_MMIO_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX_CH_CTL)
+
 #define _XELPDP_USBC1_AUX_CH_CTL	0x16f210
 #define _XELPDP_USBC2_AUX_CH_CTL	0x16f410
 #define _XELPDP_DP_AUX_CH_CTL(aux_ch)						\
@@ -78,6 +82,10 @@
 #define VLV_DP_AUX_CH_DATA(aux_ch, i)	_MMIO(VLV_DISPLAY_BASE + _PORT(aux_ch, _DPA_AUX_CH_DATA1, \
 								       _DPB_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
 
+#define _PCH_DPB_AUX_CH_DATA1		0xe4114
+#define _PCH_DPC_AUX_CH_DATA1		0xe4214
+#define PCH_DP_AUX_CH_DATA(aux_ch, i)	_MMIO(_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
+
 #define _XELPDP_USBC1_AUX_CH_DATA1	0x16f214
 #define _XELPDP_USBC2_AUX_CH_DATA1	0x16f414
 #define _XELPDP_DP_AUX_CH_DATA(aux_ch, i)					\

drivers/gpu/drm/i915/i915_reg.h

@@ -3601,20 +3601,13 @@
 
 #define _PCH_DP_B		0xe4100
 #define PCH_DP_B		_MMIO(_PCH_DP_B)
-#define _PCH_DPB_AUX_CH_CTL	0xe4110
-#define _PCH_DPB_AUX_CH_DATA1	0xe4114
 
 #define _PCH_DP_C		0xe4200
 #define PCH_DP_C		_MMIO(_PCH_DP_C)
-#define _PCH_DPC_AUX_CH_CTL	0xe4210
-#define _PCH_DPC_AUX_CH_DATA1	0xe4214
 
 #define _PCH_DP_D		0xe4300
 #define PCH_DP_D		_MMIO(_PCH_DP_D)
 
-#define PCH_DP_AUX_CH_CTL(aux_ch)		_MMIO_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX_CH_CTL)
-#define PCH_DP_AUX_CH_DATA(aux_ch, i)	_MMIO(_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
-
 /* CPT */
 #define _TRANS_DP_CTL_A		0xe0300
 #define _TRANS_DP_CTL_B		0xe1300