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Kirill Smelkov
linux
Commits
4ae16934
Commit
4ae16934
authored
Jul 02, 2004
by
Linus Torvalds
Browse files
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Browse Files
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Plain Diff
Merge
bk://kernel.bkbits.net/gregkh/linux/pci-2.6
into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents
9ce0eacb
d3e60872
Changes
6
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6 changed files
with
66 additions
and
7 deletions
+66
-7
drivers/pci/hotplug/rpaphp.h
drivers/pci/hotplug/rpaphp.h
+2
-2
drivers/pci/hotplug/rpaphp_pci.c
drivers/pci/hotplug/rpaphp_pci.c
+12
-3
drivers/pci/pci.ids
drivers/pci/pci.ids
+1
-0
drivers/pci/probe.c
drivers/pci/probe.c
+3
-2
include/linux/pci.h
include/linux/pci.h
+45
-0
include/linux/pci_ids.h
include/linux/pci_ids.h
+3
-0
No files found.
drivers/pci/hotplug/rpaphp.h
View file @
4ae16934
...
...
@@ -85,6 +85,7 @@ struct rpaphp_pci_func {
* struct slot - slot information for each *physical* slot
*/
struct
slot
{
struct
list_head
rpaphp_slot_list
;
int
state
;
u32
index
;
u32
type
;
...
...
@@ -92,6 +93,7 @@ struct slot {
char
*
name
;
char
*
location
;
u8
removable
;
u8
dev_type
;
/* VIO or PCI */
struct
device_node
*
dn
;
/* slot's device_node in OFDT */
/* dn has phb info */
struct
pci_dev
*
bridge
;
/* slot's pci_dev in pci_devices */
...
...
@@ -99,9 +101,7 @@ struct slot {
struct
list_head
pci_funcs
;
/* pci_devs in PCI slot */
struct
vio_dev
*
vio_dev
;
/* vio_dev in VIO slot */
}
dev
;
u8
dev_type
;
/* VIO or PCI */
struct
hotplug_slot
*
hotplug_slot
;
struct
list_head
rpaphp_slot_list
;
};
extern
struct
hotplug_slot_ops
rpaphp_hotplug_slot_ops
;
...
...
drivers/pci/hotplug/rpaphp_pci.c
View file @
4ae16934
...
...
@@ -379,8 +379,8 @@ int rpaphp_unconfig_pci_adapter(struct slot *slot)
func
=
list_entry
(
ln
,
struct
rpaphp_pci_func
,
sibling
);
if
(
func
->
pci_dev
)
{
rpaphp_eeh_remove_bus_device
(
func
->
pci_dev
);
pci_remove_bus_device
(
func
->
pci_dev
);
rpaphp_eeh_remove_bus_device
(
func
->
pci_dev
);
}
kfree
(
func
);
}
...
...
@@ -514,9 +514,18 @@ struct hotplug_slot *rpaphp_find_hotplug_slot(struct pci_dev *dev)
struct
list_head
*
ln
;
slot
=
list_entry
(
tmp
,
struct
slot
,
rpaphp_slot_list
);
if
(
slot
->
bridge
==
NULL
)
{
if
(
slot
->
dev_type
==
PCI_DEV
)
{
printk
(
KERN_WARNING
"PCI slot missing bridge %s %s
\n
"
,
slot
->
name
,
slot
->
location
);
}
continue
;
}
bus
=
slot
->
bridge
->
subordinate
;
if
(
!
bus
)
return
NULL
;
/* shouldn't be here */
if
(
!
bus
)
{
continue
;
/* should never happen? */
}
for
(
ln
=
bus
->
devices
.
next
;
ln
!=
&
bus
->
devices
;
ln
=
ln
->
next
)
{
struct
pci_dev
*
pdev
=
pci_dev_b
(
ln
);
if
(
pdev
==
dev
)
...
...
drivers/pci/pci.ids
View file @
4ae16934
...
...
@@ -5535,6 +5535,7 @@
132d Integrated Silicon Solution, Inc.
1330 MMC Networks
1331 Radisys Corp.
0030 ENP-2611
8200 82600 Host Bridge
8201 82600 IDE
8202 82600 USB
...
...
drivers/pci/probe.c
View file @
4ae16934
...
...
@@ -326,7 +326,7 @@ struct pci_bus * __devinit pci_add_new_bus(struct pci_bus *parent, struct pci_de
return
child
;
}
static
unsigned
int
__devinit
pci_scan_child_bus
(
struct
pci_bus
*
bus
);
unsigned
int
__devinit
pci_scan_child_bus
(
struct
pci_bus
*
bus
);
/*
* If it's a bridge, configure it and scan the bus behind it.
...
...
@@ -694,7 +694,7 @@ int __devinit pci_scan_slot(struct pci_bus *bus, int devfn)
return
nr
;
}
static
unsigned
int
__devinit
pci_scan_child_bus
(
struct
pci_bus
*
bus
)
unsigned
int
__devinit
pci_scan_child_bus
(
struct
pci_bus
*
bus
)
{
unsigned
int
devfn
,
pass
,
max
=
bus
->
secondary
;
struct
pci_dev
*
dev
;
...
...
@@ -801,4 +801,5 @@ EXPORT_SYMBOL(pci_do_scan_bus);
EXPORT_SYMBOL
(
pci_scan_slot
);
EXPORT_SYMBOL
(
pci_scan_bridge
);
EXPORT_SYMBOL
(
pci_scan_single_device
);
EXPORT_SYMBOL_GPL
(
pci_scan_child_bus
);
#endif
include/linux/pci.h
View file @
4ae16934
...
...
@@ -321,6 +321,50 @@
#define PCI_X_STATUS_266MHZ 0x40000000
/* 266 MHz capable */
#define PCI_X_STATUS_533MHZ 0x80000000
/* 533 MHz capable */
/* PCI Express capability registers */
#define PCI_EXP_FLAGS 2
/* Capabilities register */
#define PCI_EXP_FLAGS_VERS 0x000f
/* Capability version */
#define PCI_EXP_FLAGS_TYPE 0x00f0
/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT 0x0
/* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END 0x1
/* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT 0x4
/* Root Port */
#define PCI_EXP_TYPE_UPSTREAM 0x5
/* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6
/* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7
/* PCI/PCI-X Bridge */
#define PCI_EXP_FLAGS_SLOT 0x0100
/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ 0x3e00
/* Interrupt message number */
#define PCI_EXP_DEVCAP 4
/* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD 0x07
/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM 0x18
/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG 0x20
/* Extended tags */
#define PCI_EXP_DEVCAP_L0S 0x1c0
/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L1 0xe00
/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT 0x1000
/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND 0x2000
/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND 0x4000
/* Power Indicator Present */
#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000
/* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000
/* Slot Power Limit Scale */
#define PCI_EXP_DEVCTL 8
/* Device Control */
#define PCI_EXP_DEVCTL_CERE 0x0001
/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE 0x0002
/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE 0x0004
/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE 0x0008
/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAX_EN 0x0010
/* Enable relaxed ordering */
#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG 0x0100
/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM 0x0200
/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME 0x0400
/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800
/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ 0x7000
/* Max_Read_Request_Size */
#define PCI_EXP_DEVSTA 10
/* Device Status */
#define PCI_EXP_DEVSTA_CED 0x01
/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED 0x02
/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED 0x04
/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD 0x08
/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD 0x10
/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND 0x20
/* Transactions Pending */
/* Extended Capabilities (PCI-X 2.0 and Express) */
#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
#define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf)
...
...
@@ -659,6 +703,7 @@ static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *s
}
int
pci_scan_slot
(
struct
pci_bus
*
bus
,
int
devfn
);
struct
pci_dev
*
pci_scan_single_device
(
struct
pci_bus
*
bus
,
int
devfn
);
unsigned
int
pci_scan_child_bus
(
struct
pci_bus
*
bus
);
void
pci_bus_add_devices
(
struct
pci_bus
*
bus
);
void
pci_name_device
(
struct
pci_dev
*
dev
);
char
*
pci_class_name
(
u32
class
);
...
...
include/linux/pci_ids.h
View file @
4ae16934
...
...
@@ -1711,6 +1711,9 @@
#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061
#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062
#define PCI_VENDOR_ID_RADISYS 0x1331
#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
#define PCI_VENDOR_ID_DOMEX 0x134a
#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
...
...
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