Commit 4b5a59a2 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Stephen Boyd

clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks

The PCIe PIPE clock in the GCC is fed by the PIPE clock coming from the
PHY, describe this relationship.
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent bfeffd15
...@@ -1697,6 +1697,9 @@ static struct clk_branch gcc_pcie_0_pipe_clk = { ...@@ -1697,6 +1697,9 @@ static struct clk_branch gcc_pcie_0_pipe_clk = {
.enable_mask = BIT(4), .enable_mask = BIT(4),
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "gcc_pcie_0_pipe_clk", .name = "gcc_pcie_0_pipe_clk",
.parent_names = (const char *[]){ "pcie_0_pipe_clk" },
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_branch2_ops, .ops = &clk_branch2_ops,
}, },
}, },
...@@ -1796,6 +1799,8 @@ static struct clk_branch gcc_pcie_1_pipe_clk = { ...@@ -1796,6 +1799,8 @@ static struct clk_branch gcc_pcie_1_pipe_clk = {
.enable_mask = BIT(30), .enable_mask = BIT(30),
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "gcc_pcie_1_pipe_clk", .name = "gcc_pcie_1_pipe_clk",
.parent_names = (const char *[]){ "pcie_1_pipe_clk" },
.num_parents = 1,
.ops = &clk_branch2_ops, .ops = &clk_branch2_ops,
}, },
}, },
......
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