Commit 4c61a1e7 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo

ARM: dts: imx6dl: correct cpufreq volt/freq table

Currently the cpufreq volt/freq table we used is
for LDO enable mode, according to latest datasheet
Rev. 3, 03/2014, the volt/freq table is as below:

LDO enabled(min value):
996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

LDO bypassed(min value):
996MHz: VDDARM: 1.250V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

Adding 25mV to cover board IR drop, for LDO enabled
mode of 996MHz, VDDARM should be 1.250V, so this
patch updates it.
Signed-off-by: default avatarAnson Huang <b20788@freescale.com>
Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent eabb3227
......@@ -28,7 +28,7 @@ cpu@0 {
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
996000 1275000
996000 1250000
792000 1175000
396000 1075000
>;
......
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