Commit 4c7a0c95 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'staging-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging driver updates from Greg KH:
 "Here is the big set of staging driver updates for 6.7-rc1. A bit
  bigger than 6.6 this time around, as it coincided with the Outreachy
  and mentorship application process, so we got a bunch of new
  developers sending in their first changes, which is nice to see.

  Also in here is a removal of the qlge ethernet driver, and the
  rtl8192u wireless driver. Both of these were very old and no one was
  maintaining them, the wireless driver removal was due to no one using
  it anymore, and no hardware to be found, and is part of a larger
  effort to remove unused and old wifi drivers from the system.

  The qlge ethernet driver did have one user pop up after it was
  dropped, and we are working with the network mainainers to figure out
  what tree it will come back in from and who will be responsible for
  it, and if it really is being used or not. Odds are it will show up in
  a network subsystem pull request after -rc1 is out, but we aren't sure
  yet.

  Other smaller changes in here are:

   - Lots of vc04_services work by Umang to clean up the mess created by
     the rpi developers long ago, bringing it almost into good enough
     shape to get out of staging, hopefully next major release, it's
     getting close.

   - rtl8192e variable cleanups and removal of unused code and
     structures

   - vme_user coding style cleanups

   - other small coding style cleanups to lots of the staging drivers

   - octeon typedef removals, and then last-minute revert when it was
     found to break the build in some configurations (it's a hard driver
     to build properly, none of the normal automated testing catches
     it.)

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'staging-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (256 commits)
  Revert "staging: octeon: remove typedef in enum cvmx_spi_mode_t"
  Revert "staging: octeon: remove typedef in enum cvmx_helper_interface_mode_t"
  Revert "staging: octeon: remove typedef in enum cvmx_pow_wait_t"
  Revert "staging: octeon: remove typedef in struct cvmx_pko_lock_t"
  Revert "staging: octeon: remove typedef in enum cvmx_pko_status_t"
  Revert "staging: octeon: remove typedef in structs cvmx_pip_port_status_t and cvmx_pko_port_status_t"
  staging: vt6655: Type encoding info dropped from variable name "byRxRate"
  staging: vt6655: Type encoding info dropped from function name "CARDbUpdateTSF"
  staging: vt6655: Type encoding info dropped from function name "CARDvSetRSPINF"
  staging: vt6655: Type encoding info dropped from function name "CARDbyGetPktType"
  staging: vt6655: Type encoding info dropped from variable name "byPacketType"
  staging: vt6655: Type encoding info dropped from function name "CARDbSetPhyParameter"
  staging: vt6655: Type encoding info dropped from variable name "pbyRsvTime"
  staging: vt6655: Type encoding info dropped from variable name "pbyTxRate"
  staging: vt6655: Type encoding info dropped from function name "s_vCalculateOFDMRParameter"
  staging: vt6655: Type encoding info dropped from array name "cwRXBCNTSFOff"
  staging: fbtft: Convert to platform remove callback returning void
  staging: olpc_dcon: Remove I2C_CLASS_DDC support
  staging: vc04_services: use snprintf instead of sprintf
  staging: rtl8192e: Fix line break issue at priv->rx_buf[priv->rx_idx]
  ...
parents b06f58ad a4000df5
......@@ -15,7 +15,6 @@ Contents:
ethernet/index
fddi/index
hamradio/index
qlogic/index
wifi/index
wwan/index
......
.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
QLogic QLGE Device Drivers
===============================================
Contents:
.. toctree::
:maxdepth: 2
qlge
.. only:: subproject and html
Indices
=======
* :ref:`genindex`
.. SPDX-License-Identifier: GPL-2.0
=======================================
QLogic QLGE 10Gb Ethernet device driver
=======================================
This driver use drgn and devlink for debugging.
Dump kernel data structures in drgn
-----------------------------------
To dump kernel data structures, the following Python script can be used
in drgn:
.. code-block:: python
def align(x, a):
"""the alignment a should be a power of 2
"""
mask = a - 1
return (x+ mask) & ~mask
def struct_size(struct_type):
struct_str = "struct {}".format(struct_type)
return sizeof(Object(prog, struct_str, address=0x0))
def netdev_priv(netdevice):
NETDEV_ALIGN = 32
return netdevice.value_() + align(struct_size("net_device"), NETDEV_ALIGN)
name = 'xxx'
qlge_device = None
netdevices = prog['init_net'].dev_base_head.address_of_()
for netdevice in list_for_each_entry("struct net_device", netdevices, "dev_list"):
if netdevice.name.string_().decode('ascii') == name:
print(netdevice.name)
ql_adapter = Object(prog, "struct ql_adapter", address=netdev_priv(qlge_device))
The struct ql_adapter will be printed in drgn as follows,
>>> ql_adapter
(struct ql_adapter){
.ricb = (struct ricb){
.base_cq = (u8)0,
.flags = (u8)120,
.mask = (__le16)26637,
.hash_cq_id = (u8 [1024]){ 172, 142, 255, 255 },
.ipv6_hash_key = (__le32 [10]){},
.ipv4_hash_key = (__le32 [4]){},
},
.flags = (unsigned long)0,
.wol = (u32)0,
.nic_stats = (struct nic_stats){
.tx_pkts = (u64)0,
.tx_bytes = (u64)0,
.tx_mcast_pkts = (u64)0,
.tx_bcast_pkts = (u64)0,
.tx_ucast_pkts = (u64)0,
.tx_ctl_pkts = (u64)0,
.tx_pause_pkts = (u64)0,
...
},
.active_vlans = (unsigned long [64]){
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 52780853100545, 18446744073709551615,
18446619461681283072, 0, 42949673024, 2147483647,
},
.rx_ring = (struct rx_ring [17]){
{
.cqicb = (struct cqicb){
.msix_vect = (u8)0,
.reserved1 = (u8)0,
.reserved2 = (u8)0,
.flags = (u8)0,
.len = (__le16)0,
.rid = (__le16)0,
...
},
.cq_base = (void *)0x0,
.cq_base_dma = (dma_addr_t)0,
}
...
}
}
coredump via devlink
--------------------
And the coredump obtained via devlink in json format looks like,
.. code:: shell
$ devlink health dump show DEVICE reporter coredump -p -j
{
"Core Registers": {
"segment": 1,
"values": [ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ]
},
"Test Logic Regs": {
"segment": 2,
"values": [ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ]
},
"RMII Registers": {
"segment": 3,
"values": [ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ]
},
...
"Sem Registers": {
"segment": 50,
"values": [ 0,0,0,0 ]
}
}
When the module parameter qlge_force_coredump is set to be true, the MPI
RISC reset before coredumping. So coredumping will much longer since
devlink tool has to wait for 5 secs for the resetting to be
finished.
......@@ -17673,15 +17673,6 @@ L: netdev@vger.kernel.org
S: Supported
F: drivers/net/ethernet/qlogic/qlcnic/
QLOGIC QLGE 10Gb ETHERNET DRIVER
M: Manish Chopra <manishc@marvell.com>
M: GR-Linux-NIC-Dev@marvell.com
M: Coiby Xu <coiby.xu@gmail.com>
L: netdev@vger.kernel.org
S: Supported
F: Documentation/networking/device_drivers/qlogic/qlge.rst
F: drivers/staging/qlge/
QM1D1B0004 MEDIA DRIVER
M: Akihiro Tsukada <tskd08@gmail.com>
L: linux-media@vger.kernel.org
......
......@@ -248,7 +248,6 @@ CONFIG_UIO_AEC=m
CONFIG_UIO_SERCOS3=m
CONFIG_UIO_PCI_GENERIC=m
CONFIG_STAGING=y
CONFIG_QLGE=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_SECURITY=y
......
......@@ -28,8 +28,6 @@ source "drivers/staging/wlan-ng/Kconfig"
source "drivers/staging/olpc_dcon/Kconfig"
source "drivers/staging/rtl8192u/Kconfig"
source "drivers/staging/rtl8192e/Kconfig"
source "drivers/staging/rtl8723bs/Kconfig"
......@@ -74,8 +72,6 @@ source "drivers/staging/axis-fifo/Kconfig"
source "drivers/staging/fieldbus/Kconfig"
source "drivers/staging/qlge/Kconfig"
source "drivers/staging/vme_user/Kconfig"
endif # STAGING
......@@ -4,7 +4,6 @@
obj-y += media/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
obj-$(CONFIG_RTL8192U) += rtl8192u/
obj-$(CONFIG_RTL8192E) += rtl8192e/
obj-$(CONFIG_RTL8723BS) += rtl8723bs/
obj-$(CONFIG_R8712U) += rtl8712/
......@@ -27,4 +26,3 @@ obj-$(CONFIG_BCM2835_VCHIQ) += vc04_services/
obj-$(CONFIG_PI433) += pi433/
obj-$(CONFIG_XIL_AXIS_FIFO) += axis-fifo/
obj-$(CONFIG_FIELDBUS_DEV) += fieldbus/
obj-$(CONFIG_QLGE) += qlge/
......@@ -310,12 +310,11 @@ static int fbtft_driver_probe_pdev(struct platform_device *pdev) \
return fbtft_probe_common(_display, NULL, pdev); \
} \
\
static int fbtft_driver_remove_pdev(struct platform_device *pdev) \
static void fbtft_driver_remove_pdev(struct platform_device *pdev) \
{ \
struct fb_info *info = platform_get_drvdata(pdev); \
\
fbtft_remove_common(&pdev->dev, info); \
return 0; \
} \
\
FBTFT_DT_TABLE(_compatible) \
......@@ -329,7 +328,7 @@ static struct platform_driver fbtft_driver_platform_driver = { \
.of_match_table = dt_ids, \
}, \
.probe = fbtft_driver_probe_pdev, \
.remove = fbtft_driver_remove_pdev, \
.remove_new = fbtft_driver_remove_pdev, \
}; \
\
static int __init fbtft_driver_module_init(void) \
......
......@@ -218,7 +218,10 @@ static const struct regulator_desc can_power_desc = {
.ops = &can_power_ops,
};
static struct class *controller_class;
static const struct class controller_class = {
.name = "arcx_anybus_controller",
};
static DEFINE_IDA(controller_index_ida);
static int controller_probe(struct platform_device *pdev)
......@@ -301,7 +304,7 @@ static int controller_probe(struct platform_device *pdev)
err = -ENOMEM;
goto out_ida;
}
cd->class_dev->class = controller_class;
cd->class_dev->class = &controller_class;
cd->class_dev->groups = controller_attribute_groups;
cd->class_dev->parent = dev;
cd->class_dev->id = id;
......@@ -351,12 +354,12 @@ static int __init controller_init(void)
{
int err;
controller_class = class_create("arcx_anybus_controller");
if (IS_ERR(controller_class))
return PTR_ERR(controller_class);
err = class_register(&controller_class);
if (err)
return err;
err = platform_driver_register(&controller_driver);
if (err)
class_destroy(controller_class);
class_unregister(&controller_class);
return err;
}
......@@ -364,7 +367,7 @@ static int __init controller_init(void)
static void __exit controller_exit(void)
{
platform_driver_unregister(&controller_driver);
class_destroy(controller_class);
class_unregister(&controller_class);
ida_destroy(&controller_index_ida);
}
......
......@@ -160,6 +160,7 @@ static ssize_t gdm_tty_write(struct tty_struct *tty, const u8 *buf, size_t len)
while (remain) {
size_t sending_len = min_t(size_t, MUX_TX_MAX_SIZE, remain);
gdm->tty_dev->send_func(gdm->tty_dev->priv_dev,
(void *)(buf + sent_len),
sending_len,
......
......@@ -12,10 +12,9 @@
#include "audio_manager.h"
int gb_audio_manager_module_create(
struct gb_audio_manager_module **module,
struct kset *manager_kset,
int id, struct gb_audio_manager_module_descriptor *desc);
int gb_audio_manager_module_create(struct gb_audio_manager_module **module,
struct kset *manager_kset, int id,
struct gb_audio_manager_module_descriptor *desc);
/* module destroyed via kobject_put */
......
......@@ -36,7 +36,10 @@ struct gb_cap {
dev_t dev_num;
};
static struct class *cap_class;
static const struct class cap_class = {
.name = "gb_authenticate",
};
static dev_t cap_dev_num;
static DEFINE_IDA(cap_minors_map);
static LIST_HEAD(cap_list);
......@@ -336,7 +339,7 @@ int gb_cap_connection_init(struct gb_connection *connection)
goto err_remove_ida;
/* Add a soft link to the previously added char-dev within the bundle */
cap->class_device = device_create(cap_class, cap->parent, cap->dev_num,
cap->class_device = device_create(&cap_class, cap->parent, cap->dev_num,
NULL, "gb-authenticate-%d", minor);
if (IS_ERR(cap->class_device)) {
ret = PTR_ERR(cap->class_device);
......@@ -370,7 +373,7 @@ void gb_cap_connection_exit(struct gb_connection *connection)
cap = gb_connection_get_data(connection);
device_destroy(cap_class, cap->dev_num);
device_destroy(&cap_class, cap->dev_num);
cdev_del(&cap->cdev);
ida_simple_remove(&cap_minors_map, MINOR(cap->dev_num));
......@@ -402,9 +405,9 @@ int cap_init(void)
{
int ret;
cap_class = class_create("gb_authenticate");
if (IS_ERR(cap_class))
return PTR_ERR(cap_class);
ret = class_register(&cap_class);
if (ret)
return ret;
ret = alloc_chrdev_region(&cap_dev_num, 0, NUM_MINORS,
"gb_authenticate");
......@@ -414,13 +417,13 @@ int cap_init(void)
return 0;
err_remove_class:
class_destroy(cap_class);
class_unregister(&cap_class);
return ret;
}
void cap_exit(void)
{
unregister_chrdev_region(cap_dev_num, NUM_MINORS);
class_destroy(cap_class);
class_unregister(&cap_class);
ida_destroy(&cap_minors_map);
}
......@@ -491,8 +491,6 @@ static void gb_bootrom_disconnect(struct gb_bundle *bundle)
{
struct gb_bootrom *bootrom = greybus_get_drvdata(bundle);
dev_dbg(&bundle->dev, "%s\n", __func__);
gb_connection_disable(bootrom->connection);
/* Disable timeouts */
......
......@@ -220,7 +220,7 @@ static int gb_camera_operation_sync_flags(struct gb_connection *connection,
}
static int gb_camera_get_max_pkt_size(struct gb_camera *gcam,
struct gb_camera_configure_streams_response *resp)
struct gb_camera_configure_streams_response *resp)
{
unsigned int max_pkt_size = 0;
unsigned int i;
......@@ -267,8 +267,7 @@ static int gb_camera_get_max_pkt_size(struct gb_camera *gcam,
* Validate the stream configuration response verifying padding is correctly
* set and the returned number of streams is supported
*/
static const int gb_camera_configure_streams_validate_response(
struct gb_camera *gcam,
static const int gb_camera_configure_streams_validate_response(struct gb_camera *gcam,
struct gb_camera_configure_streams_response *resp,
unsigned int nstreams)
{
......@@ -378,8 +377,8 @@ struct ap_csi_config_request {
#define GB_CAMERA_CSI_CLK_FREQ_MARGIN 150000000U
static int gb_camera_setup_data_connection(struct gb_camera *gcam,
struct gb_camera_configure_streams_response *resp,
struct gb_camera_csi_params *csi_params)
struct gb_camera_configure_streams_response *resp,
struct gb_camera_csi_params *csi_params)
{
struct ap_csi_config_request csi_cfg;
struct gb_connection *conn;
......@@ -783,8 +782,8 @@ static ssize_t gb_camera_op_capabilities(void *priv, char *data, size_t len)
}
static int gb_camera_op_configure_streams(void *priv, unsigned int *nstreams,
unsigned int *flags, struct gb_camera_stream *streams,
struct gb_camera_csi_params *csi_params)
unsigned int *flags, struct gb_camera_stream *streams,
struct gb_camera_csi_params *csi_params)
{
struct gb_camera *gcam = priv;
struct gb_camera_stream_config *gb_streams;
......
......@@ -55,7 +55,10 @@ struct fw_mgmt {
*/
#define NUM_MINORS U8_MAX
static struct class *fw_mgmt_class;
static const struct class fw_mgmt_class = {
.name = "gb_fw_mgmt",
};
static dev_t fw_mgmt_dev_num;
static DEFINE_IDA(fw_mgmt_minors_map);
static LIST_HEAD(fw_mgmt_list);
......@@ -629,7 +632,7 @@ int gb_fw_mgmt_connection_init(struct gb_connection *connection)
goto err_remove_ida;
/* Add a soft link to the previously added char-dev within the bundle */
fw_mgmt->class_device = device_create(fw_mgmt_class, fw_mgmt->parent,
fw_mgmt->class_device = device_create(&fw_mgmt_class, fw_mgmt->parent,
fw_mgmt->dev_num, NULL,
"gb-fw-mgmt-%d", minor);
if (IS_ERR(fw_mgmt->class_device)) {
......@@ -664,7 +667,7 @@ void gb_fw_mgmt_connection_exit(struct gb_connection *connection)
fw_mgmt = gb_connection_get_data(connection);
device_destroy(fw_mgmt_class, fw_mgmt->dev_num);
device_destroy(&fw_mgmt_class, fw_mgmt->dev_num);
cdev_del(&fw_mgmt->cdev);
ida_simple_remove(&fw_mgmt_minors_map, MINOR(fw_mgmt->dev_num));
......@@ -696,9 +699,9 @@ int fw_mgmt_init(void)
{
int ret;
fw_mgmt_class = class_create("gb_fw_mgmt");
if (IS_ERR(fw_mgmt_class))
return PTR_ERR(fw_mgmt_class);
ret = class_register(&fw_mgmt_class);
if (ret)
return ret;
ret = alloc_chrdev_region(&fw_mgmt_dev_num, 0, NUM_MINORS,
"gb_fw_mgmt");
......@@ -708,13 +711,13 @@ int fw_mgmt_init(void)
return 0;
err_remove_class:
class_destroy(fw_mgmt_class);
class_unregister(&fw_mgmt_class);
return ret;
}
void fw_mgmt_exit(void)
{
unregister_chrdev_region(fw_mgmt_dev_num, NUM_MINORS);
class_destroy(fw_mgmt_class);
class_unregister(&fw_mgmt_class);
ida_destroy(&fw_mgmt_minors_map);
}
......@@ -29,10 +29,13 @@ struct gb_raw {
struct raw_data {
struct list_head entry;
u32 len;
u8 data[];
u8 data[] __counted_by(len);
};
static const struct class raw_class = {
.name = "gb_raw",
};
static struct class *raw_class;
static int raw_major;
static const struct file_operations raw_fops;
static DEFINE_IDA(minors);
......@@ -70,7 +73,7 @@ static int receive_data(struct gb_raw *raw, u32 len, u8 *data)
goto exit;
}
raw_data = kmalloc(sizeof(*raw_data) + len, GFP_KERNEL);
raw_data = kmalloc(struct_size(raw_data, data, len), GFP_KERNEL);
if (!raw_data) {
retval = -ENOMEM;
goto exit;
......@@ -195,7 +198,7 @@ static int gb_raw_probe(struct gb_bundle *bundle,
if (retval)
goto error_connection_disable;
raw->device = device_create(raw_class, &connection->bundle->dev,
raw->device = device_create(&raw_class, &connection->bundle->dev,
raw->dev, raw, "gb!raw%d", minor);
if (IS_ERR(raw->device)) {
retval = PTR_ERR(raw->device);
......@@ -229,7 +232,7 @@ static void gb_raw_disconnect(struct gb_bundle *bundle)
struct raw_data *temp;
// FIXME - handle removing a connection when the char device node is open.
device_destroy(raw_class, raw->dev);
device_destroy(&raw_class, raw->dev);
cdev_del(&raw->cdev);
gb_connection_disable(connection);
ida_simple_remove(&minors, MINOR(raw->dev));
......@@ -340,11 +343,9 @@ static int raw_init(void)
dev_t dev;
int retval;
raw_class = class_create("gb_raw");
if (IS_ERR(raw_class)) {
retval = PTR_ERR(raw_class);
retval = class_register(&raw_class);
if (retval)
goto error_class;
}
retval = alloc_chrdev_region(&dev, 0, NUM_MINORS, "gb_raw");
if (retval < 0)
......@@ -361,7 +362,7 @@ static int raw_init(void)
error_gb:
unregister_chrdev_region(dev, NUM_MINORS);
error_chrdev:
class_destroy(raw_class);
class_unregister(&raw_class);
error_class:
return retval;
}
......@@ -371,7 +372,7 @@ static void __exit raw_exit(void)
{
greybus_deregister(&gb_raw_driver);
unregister_chrdev_region(MKDEV(raw_major, 0), NUM_MINORS);
class_destroy(raw_class);
class_unregister(&raw_class);
ida_destroy(&minors);
}
module_exit(raw_exit);
......
......@@ -395,9 +395,9 @@ int ks_wlan_hw_tx(struct ks_wlan_private *priv, void *p, unsigned long size,
priv->hostt.buff[priv->hostt.qtail] = le16_to_cpu(hdr->event);
priv->hostt.qtail = (priv->hostt.qtail + 1) % SME_EVENT_BUFF_SIZE;
spin_lock(&priv->tx_dev.tx_dev_lock);
spin_lock_bh(&priv->tx_dev.tx_dev_lock);
result = enqueue_txdev(priv, p, size, complete_handler, skb);
spin_unlock(&priv->tx_dev.tx_dev_lock);
spin_unlock_bh(&priv->tx_dev.tx_dev_lock);
if (txq_has_space(priv))
queue_delayed_work(priv->wq, &priv->rw_dwork, 0);
......
......@@ -777,7 +777,7 @@ static struct i2c_driver dcon_driver = {
.name = "olpc_dcon",
.pm = &dcon_pm_ops,
},
.class = I2C_CLASS_DDC | I2C_CLASS_HWMON,
.class = I2C_CLASS_HWMON,
.id_table = dcon_idtable,
.probe = dcon_probe,
.remove = dcon_remove,
......
......@@ -56,7 +56,10 @@ static DEFINE_IDR(pi433_idr);
static DEFINE_MUTEX(minor_lock); /* Protect idr accesses */
static struct dentry *root_dir; /* debugfs root directory for the driver */
static struct class *pi433_class; /* mainly for udev to create /dev/pi433 */
/* mainly for udev to create /dev/pi433 */
static const struct class pi433_class = {
.name = "pi433",
};
/*
* tx config is instance specific
......@@ -1259,7 +1262,7 @@ static int pi433_probe(struct spi_device *spi)
/* create device */
device->devt = MKDEV(MAJOR(pi433_dev), device->minor);
device->dev = device_create(pi433_class,
device->dev = device_create(&pi433_class,
&spi->dev,
device->devt,
device,
......@@ -1315,7 +1318,7 @@ static int pi433_probe(struct spi_device *spi)
cdev_failed:
kthread_stop(device->tx_task_struct);
send_thread_failed:
device_destroy(pi433_class, device->devt);
device_destroy(&pi433_class, device->devt);
device_create_failed:
pi433_free_minor(device);
minor_failed:
......@@ -1342,7 +1345,7 @@ static void pi433_remove(struct spi_device *spi)
kthread_stop(device->tx_task_struct);
device_destroy(pi433_class, device->devt);
device_destroy(&pi433_class, device->devt);
cdev_del(device->cdev);
......@@ -1398,18 +1401,18 @@ static int __init pi433_init(void)
if (status < 0)
return status;
pi433_class = class_create("pi433");
if (IS_ERR(pi433_class)) {
status = class_register(&pi433_class);
if (status) {
unregister_chrdev(MAJOR(pi433_dev),
pi433_spi_driver.driver.name);
return PTR_ERR(pi433_class);
return status;
}
root_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
status = spi_register_driver(&pi433_spi_driver);
if (status < 0) {
class_destroy(pi433_class);
class_unregister(&pi433_class);
unregister_chrdev(MAJOR(pi433_dev),
pi433_spi_driver.driver.name);
}
......@@ -1422,7 +1425,7 @@ module_init(pi433_init);
static void __exit pi433_exit(void)
{
spi_unregister_driver(&pi433_spi_driver);
class_destroy(pi433_class);
class_unregister(&pi433_class);
unregister_chrdev(MAJOR(pi433_dev), pi433_spi_driver.driver.name);
debugfs_remove(root_dir);
}
......
# SPDX-License-Identifier: GPL-2.0
config QLGE
tristate "QLogic QLGE 10Gb Ethernet Driver Support"
depends on ETHERNET && PCI
select NET_DEVLINK
help
This driver supports QLogic ISP8XXX 10Gb Ethernet cards.
To compile this driver as a module, choose M here. The module will be
called qlge.
# SPDX-License-Identifier: GPL-2.0-only
#
# Makefile for the Qlogic 10GbE PCI Express ethernet driver
#
obj-$(CONFIG_QLGE) += qlge.o
qlge-objs := qlge_main.o qlge_dbg.o qlge_mpi.o qlge_ethtool.o qlge_devlink.o
* commit 7c734359d350 ("qlge: Size RX buffers based on MTU.", v2.6.33-rc1)
introduced dead code in the receive routines, which should be rewritten
anyways by the admission of the author himself, see the comment above
ql_build_rx_skb(). That function is now used exclusively to handle packets
that underwent header splitting but it still contains code to handle non
split cases.
* truesize accounting is incorrect (ex: a 9000B frame has skb->truesize 10280
while containing two frags of order-1 allocations, ie. >16K)
* while in that area, using two 8k buffers to store one 9k frame is a poor
choice of buffer size.
* in the "chain of large buffers" case, the driver uses an skb allocated with
head room but only puts data in the frags.
* rename "rx" queues to "completion" queues. Calling tx completion queues "rx
queues" is confusing.
* struct rx_ring is used for rx and tx completions, with some members relevant
to one case only
* the flow control implementation in firmware is buggy (sends a flood of pause
frames, resets the link, device and driver buffer queues become
desynchronized), disable it by default
* some structures are initialized redundantly (ex. memset 0 after
alloc_etherdev())
* the driver has a habit of using runtime checks where compile time checks are
possible (ex. ql_free_rx_buffers(), ql_alloc_rx_buffers())
* reorder struct members to avoid holes if it doesn't impact performance
* avoid legacy/deprecated apis (ex. replace pci_dma_*, replace pci_enable_msi,
use pci_iomap)
* some "while" loops could be rewritten with simple "for", ex.
ql_wait_reg_rdy(), ql_start_rx_ring())
* remove duplicate and useless comments
* fix weird line wrapping (all over, ex. the ql_set_routing_reg() calls in
qlge_set_multicast_list()).
* fix weird indentation (all over, ex. the for loops in qlge_get_stats())
* fix checkpatch issues
This diff is collapsed.
This diff is collapsed.
// SPDX-License-Identifier: GPL-2.0-or-later
#include "qlge.h"
#include "qlge_devlink.h"
static void qlge_fill_seg_(struct devlink_fmsg *fmsg,
struct mpi_coredump_segment_header *seg_header,
u32 *reg_data)
{
int regs_num = (seg_header->seg_size
- sizeof(struct mpi_coredump_segment_header)) / sizeof(u32);
int i;
devlink_fmsg_pair_nest_start(fmsg, seg_header->description);
devlink_fmsg_obj_nest_start(fmsg);
devlink_fmsg_u32_pair_put(fmsg, "segment", seg_header->seg_num);
devlink_fmsg_arr_pair_nest_start(fmsg, "values");
for (i = 0; i < regs_num; i++) {
devlink_fmsg_u32_put(fmsg, *reg_data);
reg_data++;
}
devlink_fmsg_obj_nest_end(fmsg);
devlink_fmsg_arr_pair_nest_end(fmsg);
devlink_fmsg_pair_nest_end(fmsg);
}
#define FILL_SEG(seg_hdr, seg_regs) \
qlge_fill_seg_(fmsg, &dump->seg_hdr, dump->seg_regs)
static int qlge_reporter_coredump(struct devlink_health_reporter *reporter,
struct devlink_fmsg *fmsg, void *priv_ctx,
struct netlink_ext_ack *extack)
{
int err = 0;
struct qlge_adapter *qdev = devlink_health_reporter_priv(reporter);
struct qlge_mpi_coredump *dump;
wait_queue_head_t wait;
if (!netif_running(qdev->ndev))
return 0;
if (test_bit(QL_FRC_COREDUMP, &qdev->flags)) {
if (qlge_own_firmware(qdev)) {
qlge_queue_fw_error(qdev);
init_waitqueue_head(&wait);
wait_event_timeout(wait, 0, 5 * HZ);
} else {
netif_err(qdev, ifup, qdev->ndev,
"Force Coredump failed because this NIC function doesn't own the firmware\n");
return -EPERM;
}
}
dump = kvmalloc(sizeof(*dump), GFP_KERNEL);
if (!dump)
return -ENOMEM;
err = qlge_core_dump(qdev, dump);
if (err) {
kvfree(dump);
return err;
}
qlge_soft_reset_mpi_risc(qdev);
FILL_SEG(core_regs_seg_hdr, mpi_core_regs);
FILL_SEG(test_logic_regs_seg_hdr, test_logic_regs);
FILL_SEG(rmii_regs_seg_hdr, rmii_regs);
FILL_SEG(fcmac1_regs_seg_hdr, fcmac1_regs);
FILL_SEG(fcmac2_regs_seg_hdr, fcmac2_regs);
FILL_SEG(fc1_mbx_regs_seg_hdr, fc1_mbx_regs);
FILL_SEG(ide_regs_seg_hdr, ide_regs);
FILL_SEG(nic1_mbx_regs_seg_hdr, nic1_mbx_regs);
FILL_SEG(smbus_regs_seg_hdr, smbus_regs);
FILL_SEG(fc2_mbx_regs_seg_hdr, fc2_mbx_regs);
FILL_SEG(nic2_mbx_regs_seg_hdr, nic2_mbx_regs);
FILL_SEG(i2c_regs_seg_hdr, i2c_regs);
FILL_SEG(memc_regs_seg_hdr, memc_regs);
FILL_SEG(pbus_regs_seg_hdr, pbus_regs);
FILL_SEG(mde_regs_seg_hdr, mde_regs);
FILL_SEG(nic_regs_seg_hdr, nic_regs);
FILL_SEG(nic2_regs_seg_hdr, nic2_regs);
FILL_SEG(xgmac1_seg_hdr, xgmac1);
FILL_SEG(xgmac2_seg_hdr, xgmac2);
FILL_SEG(code_ram_seg_hdr, code_ram);
FILL_SEG(memc_ram_seg_hdr, memc_ram);
FILL_SEG(xaui_an_hdr, serdes_xaui_an);
FILL_SEG(xaui_hss_pcs_hdr, serdes_xaui_hss_pcs);
FILL_SEG(xfi_an_hdr, serdes_xfi_an);
FILL_SEG(xfi_train_hdr, serdes_xfi_train);
FILL_SEG(xfi_hss_pcs_hdr, serdes_xfi_hss_pcs);
FILL_SEG(xfi_hss_tx_hdr, serdes_xfi_hss_tx);
FILL_SEG(xfi_hss_rx_hdr, serdes_xfi_hss_rx);
FILL_SEG(xfi_hss_pll_hdr, serdes_xfi_hss_pll);
qlge_fill_seg_(fmsg, &dump->misc_nic_seg_hdr,
(u32 *)&dump->misc_nic_info);
FILL_SEG(intr_states_seg_hdr, intr_states);
FILL_SEG(cam_entries_seg_hdr, cam_entries);
FILL_SEG(nic_routing_words_seg_hdr, nic_routing_words);
FILL_SEG(ets_seg_hdr, ets);
FILL_SEG(probe_dump_seg_hdr, probe_dump);
FILL_SEG(routing_reg_seg_hdr, routing_regs);
FILL_SEG(mac_prot_reg_seg_hdr, mac_prot_regs);
FILL_SEG(xaui2_an_hdr, serdes2_xaui_an);
FILL_SEG(xaui2_hss_pcs_hdr, serdes2_xaui_hss_pcs);
FILL_SEG(xfi2_an_hdr, serdes2_xfi_an);
FILL_SEG(xfi2_train_hdr, serdes2_xfi_train);
FILL_SEG(xfi2_hss_pcs_hdr, serdes2_xfi_hss_pcs);
FILL_SEG(xfi2_hss_tx_hdr, serdes2_xfi_hss_tx);
FILL_SEG(xfi2_hss_rx_hdr, serdes2_xfi_hss_rx);
FILL_SEG(xfi2_hss_pll_hdr, serdes2_xfi_hss_pll);
FILL_SEG(sem_regs_seg_hdr, sem_regs);
kvfree(dump);
return 0;
}
static const struct devlink_health_reporter_ops qlge_reporter_ops = {
.name = "coredump",
.dump = qlge_reporter_coredump,
};
long qlge_health_create_reporters(struct qlge_adapter *priv)
{
struct devlink *devlink;
long err = 0;
devlink = priv_to_devlink(priv);
priv->reporter =
devlink_health_reporter_create(devlink, &qlge_reporter_ops,
0, priv);
if (IS_ERR(priv->reporter)) {
err = PTR_ERR(priv->reporter);
netdev_warn(priv->ndev,
"Failed to create reporter, err = %ld\n",
err);
}
return err;
}
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef QLGE_DEVLINK_H
#define QLGE_DEVLINK_H
#include <net/devlink.h>
long qlge_health_create_reporters(struct qlge_adapter *priv);
#endif /* QLGE_DEVLINK_H */
This diff is collapsed.
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This diff is collapsed.
......@@ -73,19 +73,16 @@ void dot11d_channel_map(u8 channel_plan, struct rtllib_device *ieee)
for (i = 12; i <= 14; i++)
GET_DOT11D_INFO(ieee)->channel_map[i] = 2;
ieee->bss_start_channel = 10;
ieee->ibss_maxjoin_chal = 11;
break;
case COUNTRY_CODE_WORLD_WIDE_13:
for (i = 12; i <= 13; i++)
GET_DOT11D_INFO(ieee)->channel_map[i] = 2;
ieee->bss_start_channel = 10;
ieee->ibss_maxjoin_chal = 11;
break;
default:
ieee->bss_start_channel = 1;
ieee->ibss_maxjoin_chal = 14;
break;
}
}
......
......@@ -11,8 +11,6 @@
#define MAX_SILENT_RESET_RX_SLOT_NUM 10
#define RX_MPDU_QUEUE 0
enum rtl819x_loopback {
RTL819X_NO_LOOPBACK = 0,
RTL819X_MAC_LOOPBACK = 1,
......
......@@ -18,30 +18,6 @@
static int WDCAPARA_ADD[] = {EDCAPARA_BE, EDCAPARA_BK, EDCAPARA_VI,
EDCAPARA_VO};
void rtl92e_start_beacon(struct net_device *dev)
{
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
struct rtllib_network *net = &priv->rtllib->current_network;
u16 BcnTimeCfg = 0;
u16 BcnCW = 6;
u16 BcnIFS = 0xf;
rtl92e_irq_disable(dev);
rtl92e_writew(dev, ATIMWND, 2);
rtl92e_writew(dev, BCN_INTERVAL, net->beacon_interval);
rtl92e_writew(dev, BCN_DRV_EARLY_INT, 10);
rtl92e_writew(dev, BCN_DMATIME, 256);
rtl92e_writeb(dev, BCN_ERR_THRESH, 100);
BcnTimeCfg |= BcnCW << BCN_TCFG_CW_SHIFT;
BcnTimeCfg |= BcnIFS << BCN_TCFG_IFS;
rtl92e_writew(dev, BCN_TCFG, BcnTimeCfg);
rtl92e_irq_enable(dev);
}
static void _rtl92e_update_msr(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
......@@ -55,10 +31,6 @@ static void _rtl92e_update_msr(struct net_device *dev)
if (priv->rtllib->link_state == MAC80211_LINKED)
msr |= MSR_LINK_MANAGED;
break;
case IW_MODE_ADHOC:
if (priv->rtllib->link_state == MAC80211_LINKED)
msr |= MSR_LINK_ADHOC;
break;
default:
break;
}
......@@ -513,10 +485,10 @@ bool rtl92e_start_adapter(struct net_device *dev)
start:
rtl92e_reset_desc_ring(dev);
priv->rf_mode = RF_OP_By_SW_3wire;
if (priv->rst_progress == RESET_TYPE_NORESET) {
rtl92e_writeb(dev, ANAPAR, 0x37);
mdelay(500);
}
rtl92e_writeb(dev, ANAPAR, 0x37);
mdelay(500);
priv->fw_info->status = FW_STATUS_0_INIT;
ulRegRead = rtl92e_readl(dev, CPU_GEN);
......@@ -546,21 +518,20 @@ bool rtl92e_start_adapter(struct net_device *dev)
}
priv->loopback_mode = RTL819X_NO_LOOPBACK;
if (priv->rst_progress == RESET_TYPE_NORESET) {
ulRegRead = rtl92e_readl(dev, CPU_GEN);
if (priv->loopback_mode == RTL819X_NO_LOOPBACK)
ulRegRead = (ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) |
CPU_GEN_NO_LOOPBACK_SET;
else if (priv->loopback_mode == RTL819X_MAC_LOOPBACK)
ulRegRead |= CPU_CCK_LOOPBACK;
else
netdev_err(dev, "%s: Invalid loopback mode setting.\n",
__func__);
ulRegRead = rtl92e_readl(dev, CPU_GEN);
if (priv->loopback_mode == RTL819X_NO_LOOPBACK)
ulRegRead = (ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) |
CPU_GEN_NO_LOOPBACK_SET;
else if (priv->loopback_mode == RTL819X_MAC_LOOPBACK)
ulRegRead |= CPU_CCK_LOOPBACK;
else
netdev_err(dev, "%s: Invalid loopback mode setting.\n",
__func__);
rtl92e_writel(dev, CPU_GEN, ulRegRead);
rtl92e_writel(dev, CPU_GEN, ulRegRead);
udelay(500);
udelay(500);
}
_rtl92e_hwconfig(dev);
rtl92e_writeb(dev, CMDR, CR_RE | CR_TE);
......@@ -595,8 +566,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
rtl92e_writeb(dev, ACK_TIMEOUT, 0x30);
if (priv->rst_progress == RESET_TYPE_NORESET)
rtl92e_set_wireless_mode(dev, priv->rtllib->mode);
rtl92e_set_wireless_mode(dev, priv->rtllib->mode);
rtl92e_cam_reset(dev);
{
u8 SECR_value = 0x0;
......@@ -635,12 +605,10 @@ bool rtl92e_start_adapter(struct net_device *dev)
}
}
if (priv->rst_progress == RESET_TYPE_NORESET) {
rtStatus = rtl92e_config_rf(dev);
if (!rtStatus) {
netdev_info(dev, "RF Config failed\n");
return rtStatus;
}
rtStatus = rtl92e_config_rf(dev);
if (!rtStatus) {
netdev_info(dev, "RF Config failed\n");
return rtStatus;
}
rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
......@@ -662,39 +630,37 @@ bool rtl92e_start_adapter(struct net_device *dev)
else
priv->rf_mode = RF_OP_By_SW_3wire;
if (priv->rst_progress == RESET_TYPE_NORESET) {
rtl92e_dm_init_txpower_tracking(dev);
if (priv->ic_cut >= IC_VersionCut_D) {
tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance,
bMaskDWord);
rtl92e_get_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord);
for (i = 0; i < TX_BB_GAIN_TABLE_LEN; i++) {
if (tmpRegA == dm_tx_bb_gain[i]) {
priv->rfa_txpowertrackingindex = i;
priv->rfa_txpowertrackingindex_real = i;
priv->rfa_txpowertracking_default =
priv->rfa_txpowertrackingindex;
break;
}
rtl92e_dm_init_txpower_tracking(dev);
if (priv->ic_cut >= IC_VersionCut_D) {
tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance,
bMaskDWord);
rtl92e_get_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord);
for (i = 0; i < TX_BB_GAIN_TABLE_LEN; i++) {
if (tmpRegA == dm_tx_bb_gain[i]) {
priv->rfa_txpowertrackingindex = i;
priv->rfa_txpowertrackingindex_real = i;
priv->rfa_txpowertracking_default =
priv->rfa_txpowertrackingindex;
break;
}
}
TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1,
bMaskByte2);
TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1,
bMaskByte2);
for (i = 0; i < CCK_TX_BB_GAIN_TABLE_LEN; i++) {
if (TempCCk == dm_cck_tx_bb_gain[i][0]) {
priv->cck_present_attn_20m_def = i;
break;
}
for (i = 0; i < CCK_TX_BB_GAIN_TABLE_LEN; i++) {
if (TempCCk == dm_cck_tx_bb_gain[i][0]) {
priv->cck_present_attn_20m_def = i;
break;
}
priv->cck_present_attn_40m_def = 0;
priv->cck_present_attn_diff = 0;
priv->cck_present_attn =
priv->cck_present_attn_20m_def;
priv->btxpower_tracking = false;
}
priv->cck_present_attn_40m_def = 0;
priv->cck_present_attn_diff = 0;
priv->cck_present_attn =
priv->cck_present_attn_20m_def;
priv->btxpower_tracking = false;
}
rtl92e_irq_enable(dev);
end:
......@@ -706,7 +672,6 @@ static void _rtl92e_net_update(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
struct rtllib_network *net;
u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
u16 rate_config = 0;
net = &priv->rtllib->current_network;
......@@ -715,19 +680,6 @@ static void _rtl92e_net_update(struct net_device *dev)
priv->basic_rate = rate_config &= 0x15f;
rtl92e_writew(dev, BSSIDR, *(u16 *)net->bssid);
rtl92e_writel(dev, BSSIDR + 2, *(u32 *)(net->bssid + 2));
if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
rtl92e_writew(dev, ATIMWND, 2);
rtl92e_writew(dev, BCN_DMATIME, 256);
rtl92e_writew(dev, BCN_INTERVAL, net->beacon_interval);
rtl92e_writew(dev, BCN_DRV_EARLY_INT, 10);
rtl92e_writeb(dev, BCN_ERR_THRESH, 100);
BcnTimeCfg |= (BcnCW << BCN_TCFG_CW_SHIFT);
BcnTimeCfg |= BcnIFS << BCN_TCFG_IFS;
rtl92e_writew(dev, BCN_TCFG, BcnTimeCfg);
}
}
void rtl92e_link_change(struct net_device *dev)
......@@ -749,15 +701,12 @@ void rtl92e_link_change(struct net_device *dev)
}
_rtl92e_update_msr(dev);
if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
if (ieee->iw_mode == IW_MODE_INFRA) {
u32 reg;
reg = rtl92e_readl(dev, RCR);
if (priv->rtllib->link_state == MAC80211_LINKED) {
if (ieee->intel_promiscuous_md_info.promiscuous_on)
;
else
priv->receive_config = reg |= RCR_CBSSID;
priv->receive_config = reg |= RCR_CBSSID;
} else {
priv->receive_config = reg &= ~RCR_CBSSID;
}
......@@ -1411,12 +1360,12 @@ static void _rtl92e_process_phyinfo(struct r8192_priv *priv, u8 *buffer,
static u32 slide_beacon_adc_pwdb_index;
static u32 slide_beacon_adc_pwdb_statistics;
static u32 last_beacon_adc_pwdb;
struct rtllib_hdr_3addr *hdr;
struct ieee80211_hdr_3addr *hdr;
u16 sc;
unsigned int seq;
hdr = (struct rtllib_hdr_3addr *)buffer;
sc = le16_to_cpu(hdr->seq_ctl);
hdr = (struct ieee80211_hdr_3addr *)buffer;
sc = le16_to_cpu(hdr->seq_ctrl);
seq = WLAN_GET_SEQ_SEQ(sc);
curr_st->Seq_Num = seq;
if (!prev_st->bIsAMPDU)
......@@ -1561,7 +1510,7 @@ static void _rtl92e_translate_rx_signal_stats(struct net_device *dev,
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
bool bpacket_match_bssid, bpacket_toself;
bool bPacketBeacon = false;
struct rtllib_hdr_3addr *hdr;
struct ieee80211_hdr_3addr *hdr;
bool bToSelfBA = false;
static struct rtllib_rx_stats previous_stats;
u16 fc, type;
......@@ -1570,21 +1519,21 @@ static void _rtl92e_translate_rx_signal_stats(struct net_device *dev,
tmp_buf = skb->data + pstats->RxDrvInfoSize + pstats->RxBufShift;
hdr = (struct rtllib_hdr_3addr *)tmp_buf;
fc = le16_to_cpu(hdr->frame_ctl);
hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
fc = le16_to_cpu(hdr->frame_control);
type = WLAN_FC_GET_TYPE(fc);
praddr = hdr->addr1;
bpacket_match_bssid =
((type != RTLLIB_FTYPE_CTL) &&
ether_addr_equal(priv->rtllib->current_network.bssid,
(fc & RTLLIB_FCTL_TODS) ? hdr->addr1 :
(fc & RTLLIB_FCTL_FROMDS) ? hdr->addr2 :
(fc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
(fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
hdr->addr3) &&
(!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV));
bpacket_toself = bpacket_match_bssid && /* check this */
ether_addr_equal(praddr, priv->rtllib->dev->dev_addr);
if (WLAN_FC_GET_FRAMETYPE(fc) == RTLLIB_STYPE_BEACON)
if (ieee80211_is_beacon(hdr->frame_control))
bPacketBeacon = true;
_rtl92e_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
_rtl92e_query_rxphystatus(priv, pstats, pdesc, pdrvinfo,
......@@ -1870,7 +1819,7 @@ rtl92e_init_variables(struct net_device *dev)
priv->bfirst_after_down = false;
}
void rtl92e_enable_irq(struct net_device *dev)
void rtl92e_irq_enable(struct net_device *dev)
{
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
......@@ -1879,7 +1828,7 @@ void rtl92e_enable_irq(struct net_device *dev)
rtl92e_writel(dev, INTA_MASK, priv->irq_mask[0]);
}
void rtl92e_disable_irq(struct net_device *dev)
void rtl92e_irq_disable(struct net_device *dev)
{
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
......@@ -1892,7 +1841,7 @@ void rtl92e_enable_rx(struct net_device *dev)
{
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
rtl92e_writel(dev, RDQDA, priv->rx_ring_dma[RX_MPDU_QUEUE]);
rtl92e_writel(dev, RDQDA, priv->rx_ring_dma);
}
static const u32 TX_DESC_BASE[] = {
......
......@@ -16,10 +16,7 @@ bool rtl92e_is_rx_stuck(struct net_device *dev);
void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta);
void rtl92e_enable_rx(struct net_device *dev);
void rtl92e_enable_tx(struct net_device *dev);
void rtl92e_enable_irq(struct net_device *dev);
void rtl92e_disable_irq(struct net_device *dev);
void rtl92e_init_variables(struct net_device *dev);
void rtl92e_start_beacon(struct net_device *dev);
void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val);
void rtl92e_get_eeprom_size(struct net_device *dev);
bool rtl92e_start_adapter(struct net_device *dev);
......
......@@ -43,7 +43,7 @@ enum _RTL8192PCI_HW {
PMR = 0x00c,
EPROM_CMD = 0x00e,
#define EPROM_CMD_9356SEL BIT4
#define EPROM_CMD_9356SEL BIT(4)
#define EPROM_CMD_OPERATING_MODE_SHIFT 6
#define EPROM_CMD_NORMAL 0
#define EPROM_CMD_PROGRAM 2
......@@ -61,16 +61,16 @@ enum _RTL8192PCI_HW {
#define CR_TE 0x04
SIFS = 0x03E,
RCR = 0x044,
#define RCR_ONLYERLPKT BIT31
#define RCR_CBSSID BIT23
#define RCR_ADD3 BIT21
#define RCR_AMF BIT20
#define RCR_ADF BIT18
#define RCR_AICV BIT12
#define RCR_AB BIT3
#define RCR_AM BIT2
#define RCR_APM BIT1
#define RCR_AAP BIT0
#define RCR_ONLYERLPKT BIT(31)
#define RCR_CBSSID BIT(23)
#define RCR_ADD3 BIT(21)
#define RCR_AMF BIT(20)
#define RCR_ADF BIT(18)
#define RCR_AICV BIT(12)
#define RCR_AB BIT(3)
#define RCR_AM BIT(2)
#define RCR_APM BIT(1)
#define RCR_AAP BIT(0)
#define RCR_MXDMA_OFFSET 8
#define RCR_FIFO_OFFSET 13
SLOT_TIME = 0x049,
......@@ -95,34 +95,34 @@ enum _RTL8192PCI_HW {
#define TOTAL_CAM_ENTRY 32
WCAMI = 0x0A4,
SECR = 0x0B0,
#define SCR_TxUseDK BIT0
#define SCR_RxUseDK BIT1
#define SCR_TxEncEnable BIT2
#define SCR_RxDecEnable BIT3
#define SCR_NoSKMC BIT5
#define SCR_TxUseDK BIT(0)
#define SCR_RxUseDK BIT(1)
#define SCR_TxEncEnable BIT(2)
#define SCR_RxDecEnable BIT(3)
#define SCR_NoSKMC BIT(5)
SWREGULATOR = 0x0BD,
INTA_MASK = 0x0f4,
#define IMR_TBDOK BIT27
#define IMR_TBDER BIT26
#define IMR_TXFOVW BIT15
#define IMR_TIMEOUT0 BIT14
#define IMR_BcnInt BIT13
#define IMR_RXFOVW BIT12
#define IMR_RDU BIT11
#define IMR_RXCMDOK BIT10
#define IMR_BDOK BIT9
#define IMR_HIGHDOK BIT8
#define IMR_COMDOK BIT7
#define IMR_MGNTDOK BIT6
#define IMR_HCCADOK BIT5
#define IMR_BKDOK BIT4
#define IMR_BEDOK BIT3
#define IMR_VIDOK BIT2
#define IMR_VODOK BIT1
#define IMR_ROK BIT0
#define IMR_TBDOK BIT(27)
#define IMR_TBDER BIT(26)
#define IMR_TXFOVW BIT(15)
#define IMR_TIMEOUT0 BIT(14)
#define IMR_BcnInt BIT(13)
#define IMR_RXFOVW BIT(12)
#define IMR_RDU BIT(11)
#define IMR_RXCMDOK BIT(10)
#define IMR_BDOK BIT(9)
#define IMR_HIGHDOK BIT(8)
#define IMR_COMDOK BIT(7)
#define IMR_MGNTDOK BIT(6)
#define IMR_HCCADOK BIT(5)
#define IMR_BKDOK BIT(4)
#define IMR_BEDOK BIT(3)
#define IMR_VIDOK BIT(2)
#define IMR_VODOK BIT(1)
#define IMR_ROK BIT(0)
ISR = 0x0f8,
TP_POLL = 0x0fd,
#define TP_POLL_CQ BIT5
#define TP_POLL_CQ BIT(5)
PSR = 0x0ff,
CPU_GEN = 0x100,
#define CPU_CCK_LOOPBACK 0x00030000
......@@ -136,9 +136,9 @@ enum _RTL8192PCI_HW {
#define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF
#define CPU_GEN_NO_LOOPBACK_SET 0x00080000
ACM_HW_CTRL = 0x171,
#define ACM_HW_BEQ_EN BIT1
#define ACM_HW_VIQ_EN BIT2
#define ACM_HW_VOQ_EN BIT3
#define ACM_HW_BEQ_EN BIT(1)
#define ACM_HW_VIQ_EN BIT(2)
#define ACM_HW_VOQ_EN BIT(3)
RQPN1 = 0x180,
RQPN2 = 0x184,
RQPN3 = 0x188,
......@@ -159,7 +159,7 @@ enum _RTL8192PCI_HW {
WFCRC2 = 0x2f8,
BW_OPMODE = 0x300,
#define BW_OPMODE_20MHZ BIT2
#define BW_OPMODE_20MHZ BIT(2)
IC_VERRSION = 0x301,
MSR = 0x303,
#define MSR_LINK_MASK (BIT(1) | BIT(0))
......@@ -178,19 +178,19 @@ enum _RTL8192PCI_HW {
TSFR = 0x308,
RRSR = 0x310,
#define RRSR_SHORT_OFFSET 23
#define RRSR_1M BIT0
#define RRSR_2M BIT1
#define RRSR_5_5M BIT2
#define RRSR_11M BIT3
#define RRSR_6M BIT4
#define RRSR_9M BIT5
#define RRSR_12M BIT6
#define RRSR_18M BIT7
#define RRSR_24M BIT8
#define RRSR_36M BIT9
#define RRSR_48M BIT10
#define RRSR_54M BIT11
#define BRSR_AckShortPmb BIT23
#define RRSR_1M BIT(0)
#define RRSR_2M BIT(1)
#define RRSR_5_5M BIT(2)
#define RRSR_11M BIT(3)
#define RRSR_6M BIT(4)
#define RRSR_9M BIT(5)
#define RRSR_12M BIT(6)
#define RRSR_18M BIT(7)
#define RRSR_24M BIT(8)
#define RRSR_36M BIT(9)
#define RRSR_48M BIT(10)
#define RRSR_54M BIT(11)
#define BRSR_AckShortPmb BIT(23)
UFWP = 0x318,
RATR0 = 0x320,
#define RATR_1M 0x00000001
......
......@@ -513,7 +513,7 @@ static u8 _rtl92e_phy_set_sw_chnl_cmd_array(struct net_device *dev,
{
struct sw_chnl_cmd *pCmd;
if (CmdTable == NULL) {
if (!CmdTable) {
netdev_err(dev, "%s(): CmdTable cannot be NULL.\n", __func__);
return false;
}
......@@ -920,9 +920,6 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation)
case IG_Backup:
initial_gain = SCAN_RX_INITIAL_GAIN;
BitMask = bMaskByte0;
if (dm_digtable.dig_algorithm ==
DIG_ALGO_BY_FALSE_ALARM)
rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
priv->initgain_backup.xaagccore1 =
rtl92e_get_bb_reg(dev, rOFDM0_XAAGCCore1,
BitMask);
......@@ -947,10 +944,6 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation)
break;
case IG_Restore:
BitMask = 0x7f;
if (dm_digtable.dig_algorithm ==
DIG_ALGO_BY_FALSE_ALARM)
rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
rtl92e_set_bb_reg(dev, rOFDM0_XAAGCCore1, BitMask,
(u32)priv->initgain_backup.xaagccore1);
rtl92e_set_bb_reg(dev, rOFDM0_XBAGCCore1, BitMask,
......@@ -965,10 +958,6 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation)
rtl92e_set_tx_power(dev,
priv->rtllib->current_network.channel);
if (dm_digtable.dig_algorithm ==
DIG_ALGO_BY_FALSE_ALARM)
rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
break;
}
}
......@@ -976,7 +965,7 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation)
void rtl92e_set_rf_off(struct net_device *dev)
{
rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4), 0x0);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
......@@ -1027,7 +1016,7 @@ static bool _rtl92e_set_rf_power_state(struct net_device *dev,
0x4, 0x1);
priv->hw_rf_off_action = 0;
rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE,
BIT4, 0x1);
BIT(4), 0x1);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4,
0x300, 0x3);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1,
......
......@@ -248,75 +248,15 @@
#define bPAEnd 0xf
#define bTREnd 0x0f000000
#define bRFEnd 0x000f0000
/* T2R */
#define bCCAMask 0x000000f0
#define bR2RCCAMask 0x00000f00
#define bHSSI_R2TDelay 0xf8000000
#define bHSSI_T2RDelay 0xf80000
/* Channel gain at continue TX. */
#define bContTxHSSI 0x400
#define bIGFromCCK 0x200
#define bAGCAddress 0x3f
#define bRxHPTx 0x7000
#define bRxHPT2R 0x38000
#define bRxHPCCKIni 0xc0000
#define bAGCTxCode 0xc00000
#define bAGCRxCode 0x300000
#define b3WireDataLength 0x800
#define b3WireAddressLength 0x400
#define b3WireRFPowerDown 0x1
/*#define bHWSISelect 0x8 */
#define b2GPAPEPolarity 0x80000000
#define bRFSW_TxDefaultAnt 0x3
#define bRFSW_TxOptionAnt 0x30
#define bRFSW_RxDefaultAnt 0x300
#define bRFSW_RxOptionAnt 0x3000
#define bRFSI_3WireData 0x1
#define bRFSI_3WireClock 0x2
#define bRFSI_3WireLoad 0x4
#define bRFSI_3WireRW 0x8
/* 3-wire total control */
#define bRFSI_3Wire 0xf
#define bRFSI_RFENV 0x10
#define bRFSI_TRSW 0x20
#define bRFSI_TRSWB 0x40
#define bRFSI_ANTSW 0x100
#define bRFSI_ANTSWB 0x200
#define bRFSI_PAPE 0x400
#define bBandSelect 0x1
#define bHTSIG2_GI 0x80
#define bHTSIG2_Smoothing 0x01
#define bHTSIG2_Sounding 0x02
#define bHTSIG2_Aggreaton 0x08
#define bHTSIG2_STBC 0x30
#define bHTSIG2_AdvCoding 0x40
#define bHTSIG2_NumOfHTLTF 0x300
#define bHTSIG2_CRC8 0x3fc
#define bHTSIG1_MCS 0x7f
#define bHTSIG1_BandWidth 0x80
#define bHTSIG1_HTLength 0xffff
#define bLSIG_Rate 0xf
#define bLSIG_Reserved 0x10
#define bLSIG_Length 0x1fffe
#define bLSIG_Parity 0x20
#define bCCKRxPhase 0x4
#define bLSSIReadAddress 0x3f000000 /* LSSI "read" address */
#define bLSSIReadEdge 0x80000000 /* LSSI "read" edge signal */
#define bLSSIReadBackData 0xfff
#define bLSSIReadOKFlag 0x1000
#define bCCKSampleRate 0x8 /* 0: 44 MHz, 1: 88MHz */
#define bRegulator0Standby 0x1
#define bRegulatorPLLStandby 0x2
#define bRegulator1Standby 0x4
#define bPLLPowerUp 0x8
#define bDPLLPowerUp 0x10
#define bDA10PowerUp 0x20
#define bAD7PowerUp 0x200
#define bDA6PowerUp 0x2000
#define bXtalPowerUp 0x4000
#define b40MDClkPowerUP 0x8000
#define bDA6DebugMode 0x20000
#define bDA6Swing 0x380000
#define bADClkPhase 0x4000000
#define b80MClkDelay 0x18000000
......
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......@@ -20,6 +20,5 @@ void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex,
u32 *KeyContent);
void rtl92e_set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex,
u16 KeyType, const u8 *MacAddr, u32 *KeyContent);
void rtl92e_cam_restore(struct net_device *dev);
#endif
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Andrea Merello <andrea.merello@gmail.com>
v 0.1
First version.
This is based on the rtl8180-sa2400 pre-0.22-CVS code..
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