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Commit 4d510659 authored by CK Hu's avatar CK Hu Committed by Chun-Kuang Hu
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drm/mediatek: Change sub driver interface from mtk_ddp_comp to device 

Some ddp component exist in both display path and other path, so
sub driver interface should get rid of display info. Using device
instead of mtk_ddp_comp make interface general.
Signed-off-by: default avatarCK Hu <ck.hu@mediatek.com>
Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 616443ca
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Showing with 124 additions and 149 deletions
drivers/gpu/drm/mediatek/mtk_disp_color.c
View file @ 4d510659
...@@ -44,11 +44,6 @@ struct mtk_disp_color { ...@@ -44,11 +44,6 @@ struct mtk_disp_color {
const struct mtk_disp_color_data *data; const struct mtk_disp_color_data *data;
}; };
static inline struct mtk_disp_color *comp_to_color(struct mtk_ddp_comp *comp)
{
return container_of(comp, struct mtk_disp_color, ddp_comp);
}
static int mtk_color_clk_enable(struct device *dev) static int mtk_color_clk_enable(struct device *dev)
{ {
struct mtk_disp_color *color = dev_get_drvdata(dev); struct mtk_disp_color *color = dev_get_drvdata(dev);
...@@ -63,19 +58,19 @@ static void mtk_color_clk_disable(struct device *dev) ...@@ -63,19 +58,19 @@ static void mtk_color_clk_disable(struct device *dev)
clk_disable_unprepare(color->clk); clk_disable_unprepare(color->clk);
} }
static void mtk_color_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_color_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_disp_color *color = comp_to_color(comp); struct mtk_disp_color *color = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color));
mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color));
} }
static void mtk_color_start(struct mtk_ddp_comp *comp) static void mtk_color_start(struct device *dev)
{ {
struct mtk_disp_color *color = comp_to_color(comp); struct mtk_disp_color *color = dev_get_drvdata(dev);
writel(COLOR_BYPASS_ALL | COLOR_SEQ_SEL, writel(COLOR_BYPASS_ALL | COLOR_SEQ_SEL,
color->regs + DISP_COLOR_CFG_MAIN); color->regs + DISP_COLOR_CFG_MAIN);
......
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
View file @ 4d510659
...@@ -78,11 +78,6 @@ struct mtk_disp_ovl { ...@@ -78,11 +78,6 @@ struct mtk_disp_ovl {
const struct mtk_disp_ovl_data *data; const struct mtk_disp_ovl_data *data;
}; };
static inline struct mtk_disp_ovl *comp_to_ovl(struct mtk_ddp_comp *comp)
{
return container_of(comp, struct mtk_disp_ovl, ddp_comp);
}
static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id) static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id)
{ {
struct mtk_disp_ovl *priv = dev_id; struct mtk_disp_ovl *priv = dev_id;
...@@ -99,19 +94,19 @@ static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id) ...@@ -99,19 +94,19 @@ static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static void mtk_ovl_enable_vblank(struct mtk_ddp_comp *comp, static void mtk_ovl_enable_vblank(struct device *dev,
struct drm_crtc *crtc) struct drm_crtc *crtc)
{ {
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
ovl->crtc = crtc; ovl->crtc = crtc;
writel(0x0, ovl->regs + DISP_REG_OVL_INTSTA); writel(0x0, ovl->regs + DISP_REG_OVL_INTSTA);
writel_relaxed(OVL_FME_CPL_INT, ovl->regs + DISP_REG_OVL_INTEN); writel_relaxed(OVL_FME_CPL_INT, ovl->regs + DISP_REG_OVL_INTEN);
} }
static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp) static void mtk_ovl_disable_vblank(struct device *dev)
{ {
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
ovl->crtc = NULL; ovl->crtc = NULL;
writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN); writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
...@@ -131,25 +126,25 @@ static void mtk_ovl_clk_disable(struct device *dev) ...@@ -131,25 +126,25 @@ static void mtk_ovl_clk_disable(struct device *dev)
clk_disable_unprepare(ovl->clk); clk_disable_unprepare(ovl->clk);
} }
static void mtk_ovl_start(struct mtk_ddp_comp *comp) static void mtk_ovl_start(struct device *dev)
{ {
struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
writel_relaxed(0x1, ovl->regs + DISP_REG_OVL_EN); writel_relaxed(0x1, ovl->regs + DISP_REG_OVL_EN);
} }
static void mtk_ovl_stop(struct mtk_ddp_comp *comp) static void mtk_ovl_stop(struct device *dev)
{ {
struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_EN); writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_EN);
} }
static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_ovl_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
if (w != 0 && h != 0) if (w != 0 && h != 0)
mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs, mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs,
...@@ -160,20 +155,20 @@ static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w, ...@@ -160,20 +155,20 @@ static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w,
mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST);
} }
static unsigned int mtk_ovl_layer_nr(struct mtk_ddp_comp *comp) static unsigned int mtk_ovl_layer_nr(struct device *dev)
{ {
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
return ovl->data->layer_nr; return ovl->data->layer_nr;
} }
static unsigned int mtk_ovl_supported_rotations(struct mtk_ddp_comp *comp) static unsigned int mtk_ovl_supported_rotations(struct device *dev)
{ {
return DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 | return DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 |
DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y; DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
} }
static int mtk_ovl_layer_check(struct mtk_ddp_comp *comp, unsigned int idx, static int mtk_ovl_layer_check(struct device *dev, unsigned int idx,
struct mtk_plane_state *mtk_state) struct mtk_plane_state *mtk_state)
{ {
struct drm_plane_state *state = &mtk_state->base; struct drm_plane_state *state = &mtk_state->base;
...@@ -201,13 +196,13 @@ static int mtk_ovl_layer_check(struct mtk_ddp_comp *comp, unsigned int idx, ...@@ -201,13 +196,13 @@ static int mtk_ovl_layer_check(struct mtk_ddp_comp *comp, unsigned int idx,
return 0; return 0;
} }
static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx, static void mtk_ovl_layer_on(struct device *dev, unsigned int idx,
struct cmdq_pkt *cmdq_pkt) struct cmdq_pkt *cmdq_pkt)
{ {
unsigned int gmc_thrshd_l; unsigned int gmc_thrshd_l;
unsigned int gmc_thrshd_h; unsigned int gmc_thrshd_h;
unsigned int gmc_value; unsigned int gmc_value;
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs,
DISP_REG_OVL_RDMA_CTRL(idx)); DISP_REG_OVL_RDMA_CTRL(idx));
...@@ -226,10 +221,10 @@ static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx, ...@@ -226,10 +221,10 @@ static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx,
DISP_REG_OVL_SRC_CON, BIT(idx)); DISP_REG_OVL_SRC_CON, BIT(idx));
} }
static void mtk_ovl_layer_off(struct mtk_ddp_comp *comp, unsigned int idx, static void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
struct cmdq_pkt *cmdq_pkt) struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs,
DISP_REG_OVL_SRC_CON, BIT(idx)); DISP_REG_OVL_SRC_CON, BIT(idx));
...@@ -273,11 +268,11 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt) ...@@ -273,11 +268,11 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
} }
} }
static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, static void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
struct mtk_plane_state *state, struct mtk_plane_state *state,
struct cmdq_pkt *cmdq_pkt) struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
struct mtk_plane_pending_state *pending = &state->pending; struct mtk_plane_pending_state *pending = &state->pending;
unsigned int addr = pending->addr; unsigned int addr = pending->addr;
unsigned int pitch = pending->pitch & 0xffff; unsigned int pitch = pending->pitch & 0xffff;
...@@ -287,7 +282,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, ...@@ -287,7 +282,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
unsigned int con; unsigned int con;
if (!pending->enable) { if (!pending->enable) {
mtk_ovl_layer_off(comp, idx, cmdq_pkt); mtk_ovl_layer_off(dev, idx, cmdq_pkt);
return; return;
} }
...@@ -316,12 +311,12 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, ...@@ -316,12 +311,12 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg, ovl->regs, mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg, ovl->regs,
DISP_REG_OVL_ADDR(ovl, idx)); DISP_REG_OVL_ADDR(ovl, idx));
mtk_ovl_layer_on(comp, idx, cmdq_pkt); mtk_ovl_layer_on(dev, idx, cmdq_pkt);
} }
static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp) static void mtk_ovl_bgclr_in_on(struct device *dev)
{ {
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
unsigned int reg; unsigned int reg;
reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON); reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
...@@ -329,9 +324,9 @@ static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp) ...@@ -329,9 +324,9 @@ static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp)
writel(reg, ovl->regs + DISP_REG_OVL_DATAPATH_CON); writel(reg, ovl->regs + DISP_REG_OVL_DATAPATH_CON);
} }
static void mtk_ovl_bgclr_in_off(struct mtk_ddp_comp *comp) static void mtk_ovl_bgclr_in_off(struct device *dev)
{ {
struct mtk_disp_ovl *ovl = comp_to_ovl(comp); struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
unsigned int reg; unsigned int reg;
reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON); reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
......
drivers/gpu/drm/mediatek/mtk_disp_rdma.c
View file @ 4d510659
...@@ -69,11 +69,6 @@ struct mtk_disp_rdma { ...@@ -69,11 +69,6 @@ struct mtk_disp_rdma {
const struct mtk_disp_rdma_data *data; const struct mtk_disp_rdma_data *data;
}; };
static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp)
{
return container_of(comp, struct mtk_disp_rdma, ddp_comp);
}
static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id) static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id)
{ {
struct mtk_disp_rdma *priv = dev_id; struct mtk_disp_rdma *priv = dev_id;
...@@ -90,32 +85,32 @@ static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id) ...@@ -90,32 +85,32 @@ static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static void rdma_update_bits(struct mtk_ddp_comp *comp, unsigned int reg, static void rdma_update_bits(struct device *dev, unsigned int reg,
unsigned int mask, unsigned int val) unsigned int mask, unsigned int val)
{ {
struct mtk_disp_rdma *rdma = dev_get_drvdata(comp->dev); struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
unsigned int tmp = readl(rdma->regs + reg); unsigned int tmp = readl(rdma->regs + reg);
tmp = (tmp & ~mask) | (val & mask); tmp = (tmp & ~mask) | (val & mask);
writel(tmp, rdma->regs + reg); writel(tmp, rdma->regs + reg);
} }
static void mtk_rdma_enable_vblank(struct mtk_ddp_comp *comp, static void mtk_rdma_enable_vblank(struct device *dev,
struct drm_crtc *crtc) struct drm_crtc *crtc)
{ {
struct mtk_disp_rdma *rdma = comp_to_rdma(comp); struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
rdma->crtc = crtc; rdma->crtc = crtc;
rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT,
RDMA_FRAME_END_INT); RDMA_FRAME_END_INT);
} }
static void mtk_rdma_disable_vblank(struct mtk_ddp_comp *comp) static void mtk_rdma_disable_vblank(struct device *dev)
{ {
struct mtk_disp_rdma *rdma = comp_to_rdma(comp); struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
rdma->crtc = NULL; rdma->crtc = NULL;
rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0); rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);
} }
static int mtk_rdma_clk_enable(struct device *dev) static int mtk_rdma_clk_enable(struct device *dev)
...@@ -132,24 +127,24 @@ static void mtk_rdma_clk_disable(struct device *dev) ...@@ -132,24 +127,24 @@ static void mtk_rdma_clk_disable(struct device *dev)
clk_disable_unprepare(rdma->clk); clk_disable_unprepare(rdma->clk);
} }
static void mtk_rdma_start(struct mtk_ddp_comp *comp) static void mtk_rdma_start(struct device *dev)
{ {
rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, rdma_update_bits(dev, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN,
RDMA_ENGINE_EN); RDMA_ENGINE_EN);
} }
static void mtk_rdma_stop(struct mtk_ddp_comp *comp) static void mtk_rdma_stop(struct device *dev)
{ {
rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0); rdma_update_bits(dev, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0);
} }
static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, static void mtk_rdma_config(struct device *dev, unsigned int width,
unsigned int height, unsigned int vrefresh, unsigned int height, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
unsigned int threshold; unsigned int threshold;
unsigned int reg; unsigned int reg;
struct mtk_disp_rdma *rdma = comp_to_rdma(comp); struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs, mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs,
DISP_REG_RDMA_SIZE_CON_0, 0xfff); DISP_REG_RDMA_SIZE_CON_0, 0xfff);
...@@ -206,16 +201,16 @@ static unsigned int rdma_fmt_convert(struct mtk_disp_rdma *rdma, ...@@ -206,16 +201,16 @@ static unsigned int rdma_fmt_convert(struct mtk_disp_rdma *rdma,
} }
} }
static unsigned int mtk_rdma_layer_nr(struct mtk_ddp_comp *comp) static unsigned int mtk_rdma_layer_nr(struct device *dev)
{ {
return 1; return 1;
} }
static void mtk_rdma_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, static void mtk_rdma_layer_config(struct device *dev, unsigned int idx,
struct mtk_plane_state *state, struct mtk_plane_state *state,
struct cmdq_pkt *cmdq_pkt) struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_disp_rdma *rdma = comp_to_rdma(comp); struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
struct mtk_plane_pending_state *pending = &state->pending; struct mtk_plane_pending_state *pending = &state->pending;
unsigned int addr = pending->addr; unsigned int addr = pending->addr;
unsigned int pitch = pending->pitch & 0xffff; unsigned int pitch = pending->pitch & 0xffff;
......
drivers/gpu/drm/mediatek/mtk_dpi.c
View file @ 4d510659
...@@ -562,16 +562,16 @@ static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = { ...@@ -562,16 +562,16 @@ static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
.enable = mtk_dpi_bridge_enable, .enable = mtk_dpi_bridge_enable,
}; };
static void mtk_dpi_start(struct mtk_ddp_comp *comp) static void mtk_dpi_start(struct device *dev)
{ {
struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp); struct mtk_dpi *dpi = dev_get_drvdata(dev);
mtk_dpi_power_on(dpi); mtk_dpi_power_on(dpi);
} }
static void mtk_dpi_stop(struct mtk_ddp_comp *comp) static void mtk_dpi_stop(struct device *dev)
{ {
struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp); struct mtk_dpi *dpi = dev_get_drvdata(dev);
mtk_dpi_power_off(dpi); mtk_dpi_power_off(dpi);
} }
......
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
View file @ 4d510659
...@@ -150,10 +150,10 @@ static void mtk_ddp_clk_disable(struct device *dev) ...@@ -150,10 +150,10 @@ static void mtk_ddp_clk_disable(struct device *dev)
clk_disable_unprepare(priv->clk); clk_disable_unprepare(priv->clk);
} }
void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc, static void mtk_dither_set(struct device *dev, unsigned int bpc,
unsigned int CFG, struct cmdq_pkt *cmdq_pkt) unsigned int CFG, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
/* If bpc equal to 0, the dithering function didn't be enabled */ /* If bpc equal to 0, the dithering function didn't be enabled */
if (bpc == 0) if (bpc == 0)
...@@ -177,74 +177,74 @@ void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc, ...@@ -177,74 +177,74 @@ void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
} }
} }
static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_od_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_OD_SIZE); mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_OD_SIZE);
mtk_ddp_write(cmdq_pkt, OD_RELAYMODE, &priv->cmdq_reg, priv->regs, DISP_OD_CFG); mtk_ddp_write(cmdq_pkt, OD_RELAYMODE, &priv->cmdq_reg, priv->regs, DISP_OD_CFG);
mtk_dither_set(comp, bpc, DISP_OD_CFG, cmdq_pkt); mtk_dither_set(dev, bpc, DISP_OD_CFG, cmdq_pkt);
} }
static void mtk_od_start(struct mtk_ddp_comp *comp) static void mtk_od_start(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel(1, priv->regs + DISP_OD_EN); writel(1, priv->regs + DISP_OD_EN);
} }
static void mtk_ufoe_start(struct mtk_ddp_comp *comp) static void mtk_ufoe_start(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel(UFO_BYPASS, priv->regs + DISP_REG_UFO_START); writel(UFO_BYPASS, priv->regs + DISP_REG_UFO_START);
} }
static void mtk_aal_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_aal_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_AAL_SIZE); mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_AAL_SIZE);
} }
static void mtk_aal_start(struct mtk_ddp_comp *comp) static void mtk_aal_start(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel(AAL_EN, priv->regs + DISP_AAL_EN); writel(AAL_EN, priv->regs + DISP_AAL_EN);
} }
static void mtk_aal_stop(struct mtk_ddp_comp *comp) static void mtk_aal_stop(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel_relaxed(0x0, priv->regs + DISP_AAL_EN); writel_relaxed(0x0, priv->regs + DISP_AAL_EN);
} }
static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_ccorr_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_CCORR_SIZE); mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_CCORR_SIZE);
mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &priv->cmdq_reg, priv->regs, DISP_CCORR_CFG); mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &priv->cmdq_reg, priv->regs, DISP_CCORR_CFG);
} }
static void mtk_ccorr_start(struct mtk_ddp_comp *comp) static void mtk_ccorr_start(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel(CCORR_EN, priv->regs + DISP_CCORR_EN); writel(CCORR_EN, priv->regs + DISP_CCORR_EN);
} }
static void mtk_ccorr_stop(struct mtk_ddp_comp *comp) static void mtk_ccorr_stop(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel_relaxed(0x0, priv->regs + DISP_CCORR_EN); writel_relaxed(0x0, priv->regs + DISP_CCORR_EN);
} }
...@@ -269,10 +269,10 @@ static u16 mtk_ctm_s31_32_to_s1_10(u64 in) ...@@ -269,10 +269,10 @@ static u16 mtk_ctm_s31_32_to_s1_10(u64 in)
return r; return r;
} }
static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp, static void mtk_ccorr_ctm_set(struct device *dev,
struct drm_crtc_state *state) struct drm_crtc_state *state)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
struct drm_property_blob *blob = state->ctm; struct drm_property_blob *blob = state->ctm;
struct drm_color_ctm *ctm; struct drm_color_ctm *ctm;
const u64 *input; const u64 *input;
...@@ -301,58 +301,58 @@ static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp, ...@@ -301,58 +301,58 @@ static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp,
&priv->cmdq_reg, priv->regs, DISP_CCORR_COEF_4); &priv->cmdq_reg, priv->regs, DISP_CCORR_COEF_4);
} }
static void mtk_dither_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_dither_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE); mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE);
mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG); mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG);
} }
static void mtk_dither_start(struct mtk_ddp_comp *comp) static void mtk_dither_start(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel(DITHER_EN, priv->regs + DISP_DITHER_EN); writel(DITHER_EN, priv->regs + DISP_DITHER_EN);
} }
static void mtk_dither_stop(struct mtk_ddp_comp *comp) static void mtk_dither_stop(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel_relaxed(0x0, priv->regs + DISP_DITHER_EN); writel_relaxed(0x0, priv->regs + DISP_DITHER_EN);
} }
static void mtk_gamma_config(struct mtk_ddp_comp *comp, unsigned int w, static void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt) unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_GAMMA_SIZE); mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_GAMMA_SIZE);
mtk_dither_set(comp, bpc, DISP_GAMMA_CFG, cmdq_pkt); mtk_dither_set(dev, bpc, DISP_GAMMA_CFG, cmdq_pkt);
} }
static void mtk_gamma_start(struct mtk_ddp_comp *comp) static void mtk_gamma_start(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel(GAMMA_EN, priv->regs + DISP_GAMMA_EN); writel(GAMMA_EN, priv->regs + DISP_GAMMA_EN);
} }
static void mtk_gamma_stop(struct mtk_ddp_comp *comp) static void mtk_gamma_stop(struct device *dev)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
writel_relaxed(0x0, priv->regs + DISP_GAMMA_EN); writel_relaxed(0x0, priv->regs + DISP_GAMMA_EN);
} }
static void mtk_gamma_set(struct mtk_ddp_comp *comp, static void mtk_gamma_set(struct device *dev,
struct drm_crtc_state *state) struct drm_crtc_state *state)
{ {
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev); struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
unsigned int i, reg; unsigned int i, reg;
struct drm_color_lut *lut; struct drm_color_lut *lut;
void __iomem *lut_base; void __iomem *lut_base;
...@@ -568,18 +568,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, ...@@ -568,18 +568,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
comp->id = comp_id; comp->id = comp_id;
comp->funcs = funcs ?: mtk_ddp_matches[comp_id].funcs; comp->funcs = funcs ?: mtk_ddp_matches[comp_id].funcs;
if (comp_id == DDP_COMPONENT_BLS ||
comp_id == DDP_COMPONENT_DPI0 ||
comp_id == DDP_COMPONENT_DPI1 ||
comp_id == DDP_COMPONENT_DSI0 ||
comp_id == DDP_COMPONENT_DSI1 ||
comp_id == DDP_COMPONENT_DSI2 ||
comp_id == DDP_COMPONENT_DSI3 ||
comp_id == DDP_COMPONENT_PWM0) {
return 0;
}
comp_pdev = of_find_device_by_node(node); comp_pdev = of_find_device_by_node(node);
if (!comp_pdev) { if (!comp_pdev) {
DRM_INFO("Waiting for device %s\n", node->full_name); DRM_INFO("Waiting for device %s\n", node->full_name);
...@@ -597,9 +585,13 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, ...@@ -597,9 +585,13 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
return ret; return ret;
} }
if (type == MTK_DISP_COLOR || if (type == MTK_DISP_BLS ||
type == MTK_DISP_COLOR ||
type == MTK_DPI ||
type == MTK_DSI ||
type == MTK_DISP_OVL || type == MTK_DISP_OVL ||
type == MTK_DISP_OVL_2L || type == MTK_DISP_OVL_2L ||
type == MTK_DISP_PWM ||
type == MTK_DISP_RDMA) type == MTK_DISP_RDMA)
return 0; return 0;
......
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
View file @ 4d510659
...@@ -42,26 +42,26 @@ struct cmdq_pkt; ...@@ -42,26 +42,26 @@ struct cmdq_pkt;
struct mtk_ddp_comp_funcs { struct mtk_ddp_comp_funcs {
int (*clk_enable)(struct device *dev); int (*clk_enable)(struct device *dev);
void (*clk_disable)(struct device *dev); void (*clk_disable)(struct device *dev);
void (*config)(struct mtk_ddp_comp *comp, unsigned int w, void (*config)(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh, unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt); unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void (*start)(struct mtk_ddp_comp *comp); void (*start)(struct device *dev);
void (*stop)(struct mtk_ddp_comp *comp); void (*stop)(struct device *dev);
void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc); void (*enable_vblank)(struct device *dev, struct drm_crtc *crtc);
void (*disable_vblank)(struct mtk_ddp_comp *comp); void (*disable_vblank)(struct device *dev);
unsigned int (*supported_rotations)(struct mtk_ddp_comp *comp); unsigned int (*supported_rotations)(struct device *dev);
unsigned int (*layer_nr)(struct mtk_ddp_comp *comp); unsigned int (*layer_nr)(struct device *dev);
int (*layer_check)(struct mtk_ddp_comp *comp, int (*layer_check)(struct device *dev,
unsigned int idx, unsigned int idx,
struct mtk_plane_state *state); struct mtk_plane_state *state);
void (*layer_config)(struct mtk_ddp_comp *comp, unsigned int idx, void (*layer_config)(struct device *dev, unsigned int idx,
struct mtk_plane_state *state, struct mtk_plane_state *state,
struct cmdq_pkt *cmdq_pkt); struct cmdq_pkt *cmdq_pkt);
void (*gamma_set)(struct mtk_ddp_comp *comp, void (*gamma_set)(struct device *dev,
struct drm_crtc_state *state); struct drm_crtc_state *state);
void (*bgclr_in_on)(struct mtk_ddp_comp *comp); void (*bgclr_in_on)(struct device *dev);
void (*bgclr_in_off)(struct mtk_ddp_comp *comp); void (*bgclr_in_off)(struct device *dev);
void (*ctm_set)(struct mtk_ddp_comp *comp, void (*ctm_set)(struct device *dev,
struct drm_crtc_state *state); struct drm_crtc_state *state);
}; };
...@@ -93,39 +93,39 @@ static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp, ...@@ -93,39 +93,39 @@ static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp,
struct cmdq_pkt *cmdq_pkt) struct cmdq_pkt *cmdq_pkt)
{ {
if (comp->funcs && comp->funcs->config) if (comp->funcs && comp->funcs->config)
comp->funcs->config(comp, w, h, vrefresh, bpc, cmdq_pkt); comp->funcs->config(comp->dev, w, h, vrefresh, bpc, cmdq_pkt);
} }
static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp) static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->start) if (comp->funcs && comp->funcs->start)
comp->funcs->start(comp); comp->funcs->start(comp->dev);
} }
static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp) static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->stop) if (comp->funcs && comp->funcs->stop)
comp->funcs->stop(comp); comp->funcs->stop(comp->dev);
} }
static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp, static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp,
struct drm_crtc *crtc) struct drm_crtc *crtc)
{ {
if (comp->funcs && comp->funcs->enable_vblank) if (comp->funcs && comp->funcs->enable_vblank)
comp->funcs->enable_vblank(comp, crtc); comp->funcs->enable_vblank(comp->dev, crtc);
} }
static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp) static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->disable_vblank) if (comp->funcs && comp->funcs->disable_vblank)
comp->funcs->disable_vblank(comp); comp->funcs->disable_vblank(comp->dev);
} }
static inline static inline
unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp) unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->supported_rotations) if (comp->funcs && comp->funcs->supported_rotations)
return comp->funcs->supported_rotations(comp); return comp->funcs->supported_rotations(comp->dev);
return 0; return 0;
} }
...@@ -133,7 +133,7 @@ unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp) ...@@ -133,7 +133,7 @@ unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp)
static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp) static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->layer_nr) if (comp->funcs && comp->funcs->layer_nr)
return comp->funcs->layer_nr(comp); return comp->funcs->layer_nr(comp->dev);
return 0; return 0;
} }
...@@ -143,7 +143,7 @@ static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp, ...@@ -143,7 +143,7 @@ static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp,
struct mtk_plane_state *state) struct mtk_plane_state *state)
{ {
if (comp->funcs && comp->funcs->layer_check) if (comp->funcs && comp->funcs->layer_check)
return comp->funcs->layer_check(comp, idx, state); return comp->funcs->layer_check(comp->dev, idx, state);
return 0; return 0;
} }
...@@ -153,33 +153,33 @@ static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp, ...@@ -153,33 +153,33 @@ static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
struct cmdq_pkt *cmdq_pkt) struct cmdq_pkt *cmdq_pkt)
{ {
if (comp->funcs && comp->funcs->layer_config) if (comp->funcs && comp->funcs->layer_config)
comp->funcs->layer_config(comp, idx, state, cmdq_pkt); comp->funcs->layer_config(comp->dev, idx, state, cmdq_pkt);
} }
static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp, static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
struct drm_crtc_state *state) struct drm_crtc_state *state)
{ {
if (comp->funcs && comp->funcs->gamma_set) if (comp->funcs && comp->funcs->gamma_set)
comp->funcs->gamma_set(comp, state); comp->funcs->gamma_set(comp->dev, state);
} }
static inline void mtk_ddp_comp_bgclr_in_on(struct mtk_ddp_comp *comp) static inline void mtk_ddp_comp_bgclr_in_on(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->bgclr_in_on) if (comp->funcs && comp->funcs->bgclr_in_on)
comp->funcs->bgclr_in_on(comp); comp->funcs->bgclr_in_on(comp->dev);
} }
static inline void mtk_ddp_comp_bgclr_in_off(struct mtk_ddp_comp *comp) static inline void mtk_ddp_comp_bgclr_in_off(struct mtk_ddp_comp *comp)
{ {
if (comp->funcs && comp->funcs->bgclr_in_off) if (comp->funcs && comp->funcs->bgclr_in_off)
comp->funcs->bgclr_in_off(comp); comp->funcs->bgclr_in_off(comp->dev);
} }
static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp, static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
struct drm_crtc_state *state) struct drm_crtc_state *state)
{ {
if (comp->funcs && comp->funcs->ctm_set) if (comp->funcs && comp->funcs->ctm_set)
comp->funcs->ctm_set(comp, state); comp->funcs->ctm_set(comp->dev, state);
} }
int mtk_ddp_comp_get_id(struct device_node *node, int mtk_ddp_comp_get_id(struct device_node *node,
...@@ -190,8 +190,6 @@ int mtk_ddp_comp_init(struct device_node *comp_node, struct mtk_ddp_comp *comp, ...@@ -190,8 +190,6 @@ int mtk_ddp_comp_init(struct device_node *comp_node, struct mtk_ddp_comp *comp,
enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs); enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs);
int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp); int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp);
void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp); void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
unsigned int CFG, struct cmdq_pkt *cmdq_pkt);
enum mtk_ddp_comp_type mtk_ddp_comp_get_type(enum mtk_ddp_comp_id comp_id); enum mtk_ddp_comp_type mtk_ddp_comp_get_type(enum mtk_ddp_comp_id comp_id);
void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value, void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
struct cmdq_client_reg *cmdq_reg, void __iomem *regs, struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
......
drivers/gpu/drm/mediatek/mtk_dsi.c
View file @ 4d510659
...@@ -767,16 +767,16 @@ static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = { ...@@ -767,16 +767,16 @@ static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
.mode_set = mtk_dsi_bridge_mode_set, .mode_set = mtk_dsi_bridge_mode_set,
}; };
static void mtk_dsi_ddp_start(struct mtk_ddp_comp *comp) static void mtk_dsi_ddp_start(struct device *dev)
{ {
struct mtk_dsi *dsi = container_of(comp, struct mtk_dsi, ddp_comp); struct mtk_dsi *dsi = dev_get_drvdata(dev);
mtk_dsi_poweron(dsi); mtk_dsi_poweron(dsi);
} }
static void mtk_dsi_ddp_stop(struct mtk_ddp_comp *comp) static void mtk_dsi_ddp_stop(struct device *dev)
{ {
struct mtk_dsi *dsi = container_of(comp, struct mtk_dsi, ddp_comp); struct mtk_dsi *dsi = dev_get_drvdata(dev);
mtk_dsi_poweroff(dsi); mtk_dsi_poweroff(dsi);
} }
......
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