Commit 4e2b0364 authored by Jim Snow's avatar Jim Snow Committed by Ben Hutchings

sb_edac: Fix erroneous bytes->gigabytes conversion

commit 8c009100 upstream.
Signed-off-by: default avatarJim Snow <jim.snow@intel.com>
Signed-off-by: default avatarLukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Vinson Lee <vlee@twopensource.com>
[lizf: Backported to 3.4:
 - adjust context
 - use debugf0() instead of edac_dbg()]
Signed-off-by: default avatarZefan Li <lizefan@huawei.com>
Signed-off-by: default avatarBen Hutchings <ben@decadent.org.uk>
parent f4782e32
...@@ -672,7 +672,7 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -672,7 +672,7 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
u32 reg; u32 reg;
u64 limit, prv = 0; u64 limit, prv = 0;
u64 tmp_mb; u64 tmp_mb;
u32 mb, kb; u32 gb, mb;
u32 rir_way; u32 rir_way;
/* /*
...@@ -685,9 +685,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -685,9 +685,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
pvt->tolm = GET_TOLM(reg); pvt->tolm = GET_TOLM(reg);
tmp_mb = (1 + pvt->tolm) >> 20; tmp_mb = (1 + pvt->tolm) >> 20;
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1024, &mb);
debugf0("TOLM: %u.%03u GB (0x%016Lx)\n", debugf0("TOHM: %u.%03u GB (0x%016Lx)\n",
mb, kb, (u64)pvt->tolm); gb, (mb*1000)/1024, (u64)pvt->tohm);
/* Address range is already 45:25 */ /* Address range is already 45:25 */
pci_read_config_dword(pvt->pci_sad1, TOHM, pci_read_config_dword(pvt->pci_sad1, TOHM,
...@@ -695,9 +695,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -695,9 +695,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
pvt->tohm = GET_TOHM(reg); pvt->tohm = GET_TOHM(reg);
tmp_mb = (1 + pvt->tohm) >> 20; tmp_mb = (1 + pvt->tohm) >> 20;
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1024, &mb);
debugf0("TOHM: %u.%03u GB (0x%016Lx)", debugf0("TOHM: %u.%03u GB (0x%016Lx)",
mb, kb, (u64)pvt->tohm); gb, (mb*1000)/1024, (u64)pvt->tohm);
/* /*
* Step 2) Get SAD range and SAD Interleave list * Step 2) Get SAD range and SAD Interleave list
...@@ -719,11 +719,11 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -719,11 +719,11 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
break; break;
tmp_mb = (limit + 1) >> 20; tmp_mb = (limit + 1) >> 20;
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1000, &mb);
debugf0("SAD#%d %s up to %u.%03u GB (0x%016Lx) %s reg=0x%08x\n", debugf0("SAD#%d %s up to %u.%03u GB (0x%016Lx) %s reg=0x%08x\n",
n_sads, n_sads,
get_dram_attr(reg), get_dram_attr(reg),
mb, kb, gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L, ((u64)tmp_mb) << 20L,
INTERLEAVE_MODE(reg) ? "Interleave: 8:6" : "Interleave: [8:6]XOR[18:16]", INTERLEAVE_MODE(reg) ? "Interleave: 8:6" : "Interleave: [8:6]XOR[18:16]",
reg); reg);
...@@ -753,9 +753,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -753,9 +753,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
break; break;
tmp_mb = (limit + 1) >> 20; tmp_mb = (limit + 1) >> 20;
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1000, &mb);
debugf0("TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n", debugf0("TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n",
n_tads, mb, kb, n_tads, gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L, ((u64)tmp_mb) << 20L,
(u32)TAD_SOCK(reg), (u32)TAD_SOCK(reg),
(u32)TAD_CH(reg), (u32)TAD_CH(reg),
...@@ -778,10 +778,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -778,10 +778,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
tad_ch_nilv_offset[j], tad_ch_nilv_offset[j],
&reg); &reg);
tmp_mb = TAD_OFFSET(reg) >> 20; tmp_mb = TAD_OFFSET(reg) >> 20;
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1024, &mb);
debugf0("TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n", debugf0("TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n",
i, j, i, j,
mb, kb, gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L, ((u64)tmp_mb) << 20L,
reg); reg);
} }
...@@ -803,10 +803,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -803,10 +803,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
tmp_mb = RIR_LIMIT(reg) >> 20; tmp_mb = RIR_LIMIT(reg) >> 20;
rir_way = 1 << RIR_WAY(reg); rir_way = 1 << RIR_WAY(reg);
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1024, &mb);
debugf0("CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n", debugf0("CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n",
i, j, i, j,
mb, kb, gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L, ((u64)tmp_mb) << 20L,
rir_way, rir_way,
reg); reg);
...@@ -817,10 +817,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci) ...@@ -817,10 +817,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
&reg); &reg);
tmp_mb = RIR_OFFSET(reg) << 6; tmp_mb = RIR_OFFSET(reg) << 6;
mb = div_u64_rem(tmp_mb, 1000, &kb); gb = div_u64_rem(tmp_mb, 1024, &mb);
debugf0("CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n", debugf0("CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
i, j, k, i, j, k,
mb, kb, gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L, ((u64)tmp_mb) << 20L,
(u32)RIR_RNK_TGT(reg), (u32)RIR_RNK_TGT(reg),
reg); reg);
...@@ -858,7 +858,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci, ...@@ -858,7 +858,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
u8 ch_way,sck_way; u8 ch_way,sck_way;
u32 tad_offset; u32 tad_offset;
u32 rir_way; u32 rir_way;
u32 mb, kb; u32 gb, mb;
u64 ch_addr, offset, limit, prv = 0; u64 ch_addr, offset, limit, prv = 0;
...@@ -1084,10 +1084,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci, ...@@ -1084,10 +1084,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
continue; continue;
limit = RIR_LIMIT(reg); limit = RIR_LIMIT(reg);
mb = div_u64_rem(limit >> 20, 1000, &kb); gb = div_u64_rem(limit >> 20, 1024, &mb);
debugf0("RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n", debugf0("RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n",
n_rir, n_rir,
mb, kb, gb, (mb*1000)/1024,
limit, limit,
1 << RIR_WAY(reg)); 1 << RIR_WAY(reg));
if (ch_addr <= limit) if (ch_addr <= limit)
......
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