Commit 4f075a58 authored by David S. Miller's avatar David S. Miller

Merge branch 'sh_eth-next'

Ben Hutchings says:

====================
sh_eth changes for net-next

Some minor new features and fixes.

These depend in part on the series I sent earlier for net, specifically
"sh_eth: WARN on access to a register not implemented in a particular
chip" depends on "sh_eth: Fix RX recovery on R-Car in case of RX ring
underrun".
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 27db730c 4398f9c8
This diff is collapsed.
...@@ -32,6 +32,10 @@ ...@@ -32,6 +32,10 @@
#define SH_ETH_TSU_CAM_ENTRIES 32 #define SH_ETH_TSU_CAM_ENTRIES 32
enum { enum {
/* IMPORTANT: To keep ethtool register dump working, add new
* register names immediately before SH_ETH_MAX_REGISTER_OFFSET.
*/
/* E-DMAC registers */ /* E-DMAC registers */
EDSR = 0, EDSR = 0,
EDMR, EDMR,
...@@ -131,9 +135,7 @@ enum { ...@@ -131,9 +135,7 @@ enum {
TSU_POST3, TSU_POST3,
TSU_POST4, TSU_POST4,
TSU_ADRH0, TSU_ADRH0,
TSU_ADRL0, /* TSU_ADR{H,L}{0..31} are assumed to be contiguous */
TSU_ADRH31,
TSU_ADRL31,
TXNLCR0, TXNLCR0,
TXALCR0, TXALCR0,
...@@ -491,6 +493,7 @@ struct sh_eth_cpu_data { ...@@ -491,6 +493,7 @@ struct sh_eth_cpu_data {
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */ unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
unsigned shift_rd0:1; /* shift Rx descriptor word 0 right by 16 */ unsigned shift_rd0:1; /* shift Rx descriptor word 0 right by 16 */
unsigned rmiimode:1; /* EtherC has RMIIMODE register */ unsigned rmiimode:1; /* EtherC has RMIIMODE register */
unsigned rtrate:1; /* EtherC has RTRATE register */
}; };
struct sh_eth_private { struct sh_eth_private {
...@@ -543,19 +546,29 @@ static inline void sh_eth_soft_swap(char *src, int len) ...@@ -543,19 +546,29 @@ static inline void sh_eth_soft_swap(char *src, int len)
#endif #endif
} }
#define SH_ETH_OFFSET_INVALID ((u16) ~0)
static inline void sh_eth_write(struct net_device *ndev, u32 data, static inline void sh_eth_write(struct net_device *ndev, u32 data,
int enum_index) int enum_index)
{ {
struct sh_eth_private *mdp = netdev_priv(ndev); struct sh_eth_private *mdp = netdev_priv(ndev);
u16 offset = mdp->reg_offset[enum_index];
iowrite32(data, mdp->addr + mdp->reg_offset[enum_index]); if (WARN_ON(offset == SH_ETH_OFFSET_INVALID))
return;
iowrite32(data, mdp->addr + offset);
} }
static inline u32 sh_eth_read(struct net_device *ndev, int enum_index) static inline u32 sh_eth_read(struct net_device *ndev, int enum_index)
{ {
struct sh_eth_private *mdp = netdev_priv(ndev); struct sh_eth_private *mdp = netdev_priv(ndev);
u16 offset = mdp->reg_offset[enum_index];
if (WARN_ON(offset == SH_ETH_OFFSET_INVALID))
return ~0U;
return ioread32(mdp->addr + mdp->reg_offset[enum_index]); return ioread32(mdp->addr + offset);
} }
static inline void *sh_eth_tsu_get_offset(struct sh_eth_private *mdp, static inline void *sh_eth_tsu_get_offset(struct sh_eth_private *mdp,
......
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