Commit 4f25580f authored by Shawn Lin's avatar Shawn Lin Committed by Ulf Hansson

mmc: core: changes frequency to hs_max_dtr when selecting hs400es

Per JESD84-B51 P49, Host need to change frequency to <=52MHz
after setting HS_TIMING to 0x1, and host may changes frequency
to <= 200MHz after setting HS_TIMING to 0x3. That means the card
expects the clock rate to increase from the current used f_init
(which is less than 400KHz, but still being less than 52MHz) to
52MHz, otherwise we find some eMMC devices significantly report
failure when sending status.
Reported-by: default avatarXiao Yao <xiaoyao@rock-chips.com>
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 1720d354
...@@ -1282,6 +1282,8 @@ static int mmc_select_hs400es(struct mmc_card *card) ...@@ -1282,6 +1282,8 @@ static int mmc_select_hs400es(struct mmc_card *card)
if (err) if (err)
goto out_err; goto out_err;
mmc_set_clock(host, card->ext_csd.hs_max_dtr);
err = mmc_switch_status(card); err = mmc_switch_status(card);
if (err) if (err)
goto out_err; goto out_err;
......
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