Commit 4f652cea authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Walleij

pinctrl: zynq: fix DEFINE_ZYNQ_PINMUX_FUNCTION_MUX macro

The offset to the mux register is missing.

Fixes: add958ce "pinctrl: Add driver for Zynq"
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: default avatarSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 8480c2e7
...@@ -768,12 +768,13 @@ static const char * const gpio0_groups[] = {"gpio0_0_grp", ...@@ -768,12 +768,13 @@ static const char * const gpio0_groups[] = {"gpio0_0_grp",
.mux_val = mval, \ .mux_val = mval, \
} }
#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, mux, mask, shift) \ #define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\
[ZYNQ_PMUX_##fname] = { \ [ZYNQ_PMUX_##fname] = { \
.name = #fname, \ .name = #fname, \
.groups = fname##_groups, \ .groups = fname##_groups, \
.ngroups = ARRAY_SIZE(fname##_groups), \ .ngroups = ARRAY_SIZE(fname##_groups), \
.mux_val = mval, \ .mux_val = mval, \
.mux = offset, \
.mux_mask = mask, \ .mux_mask = mask, \
.mux_shift = shift, \ .mux_shift = shift, \
} }
......
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