Commit 50638f7d authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/pm/amdgpu_smu: convert more IP version checking

Use IP versions rather than asic_type to differentiate
IP version specific features.

v2: switch if statement to a switch statement

Acked-by: Christian König <christian.koenig@amd.com> (v1)
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 61b396b9
...@@ -455,8 +455,7 @@ static int smu_get_power_num_states(void *handle, ...@@ -455,8 +455,7 @@ static int smu_get_power_num_states(void *handle,
bool is_support_sw_smu(struct amdgpu_device *adev) bool is_support_sw_smu(struct amdgpu_device *adev)
{ {
if ((adev->asic_type >= CHIP_ARCTURUS) || if (adev->ip_versions[MP1_HWIP] >= IP_VERSION(11, 0, 0))
(adev->ip_versions[MP1_HWIP] >= IP_VERSION(11, 0, 0)))
return true; return true;
return false; return false;
...@@ -602,23 +601,19 @@ static int smu_set_funcs(struct amdgpu_device *adev) ...@@ -602,23 +601,19 @@ static int smu_set_funcs(struct amdgpu_device *adev)
case IP_VERSION(11, 0, 8): case IP_VERSION(11, 0, 8):
cyan_skillfish_set_ppt_funcs(smu); cyan_skillfish_set_ppt_funcs(smu);
break; break;
default: case IP_VERSION(11, 0, 2):
switch (adev->asic_type) { adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
case CHIP_ARCTURUS: arcturus_set_ppt_funcs(smu);
adev->pm.pp_feature &= ~PP_GFXOFF_MASK; /* OD is not supported on Arcturus */
arcturus_set_ppt_funcs(smu); smu->od_enabled =false;
/* OD is not supported on Arcturus */
smu->od_enabled =false;
break;
case CHIP_ALDEBARAN:
aldebaran_set_ppt_funcs(smu);
/* Enable pp_od_clk_voltage node */
smu->od_enabled = true;
break;
default:
return -EINVAL;
}
break; break;
case IP_VERSION(13, 0, 2):
aldebaran_set_ppt_funcs(smu);
/* Enable pp_od_clk_voltage node */
smu->od_enabled = true;
break;
default:
return -EINVAL;
} }
return 0; return 0;
...@@ -2306,15 +2301,20 @@ int smu_get_power_limit(void *handle, ...@@ -2306,15 +2301,20 @@ int smu_get_power_limit(void *handle,
} else { } else {
switch (limit_level) { switch (limit_level) {
case SMU_PPT_LIMIT_CURRENT: case SMU_PPT_LIMIT_CURRENT:
if ((smu->adev->asic_type == CHIP_ALDEBARAN) || switch (adev->ip_versions[MP1_HWIP]) {
(adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 7)) || case IP_VERSION(13, 0, 2):
(adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 11)) || case IP_VERSION(11, 0, 7):
(adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 12)) || case IP_VERSION(11, 0, 11):
(adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 13))) case IP_VERSION(11, 0, 12):
case IP_VERSION(11, 0, 13):
ret = smu_get_asic_power_limits(smu, ret = smu_get_asic_power_limits(smu,
&smu->current_power_limit, &smu->current_power_limit,
NULL, NULL,
NULL); NULL);
break;
default:
break;
}
*limit = smu->current_power_limit; *limit = smu->current_power_limit;
break; break;
case SMU_PPT_LIMIT_DEFAULT: case SMU_PPT_LIMIT_DEFAULT:
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment