Commit 518b466a authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman

pinctrl: ralink: add a pinctrl driver for the rt2880 family

These Socs have 1-3 banks of 8-32 gpios. Rather then setting the muxing of each
pin individually, these socs have mux groups that when set will effect 1-N pins.
Pin groups have a 2, 4 or 8 different muxes.
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20201208075523.7060-3-sergio.paracuellos@gmail.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 289fa46a
......@@ -385,6 +385,7 @@ source "drivers/pinctrl/nomadik/Kconfig"
source "drivers/pinctrl/nuvoton/Kconfig"
source "drivers/pinctrl/pxa/Kconfig"
source "drivers/pinctrl/qcom/Kconfig"
source "drivers/pinctrl/ralink/Kconfig"
source "drivers/pinctrl/renesas/Kconfig"
source "drivers/pinctrl/samsung/Kconfig"
source "drivers/pinctrl/spear/Kconfig"
......
......@@ -59,6 +59,7 @@ obj-y += nomadik/
obj-$(CONFIG_ARCH_NPCM7XX) += nuvoton/
obj-$(CONFIG_PINCTRL_PXA) += pxa/
obj-$(CONFIG_ARCH_QCOM) += qcom/
obj-$(CONFIG_PINCTRL_RALINK) += ralink/
obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
obj-$(CONFIG_PINCTRL_SPEAR) += spear/
......
# SPDX-License-Identifier: GPL-2.0-only
menu "Ralink pinctrl drivers"
depends on RALINK
config PINCTRL_RALINK
bool "Ralink pin control support"
default y if RALINK
config PINCTRL_RT2880
bool "RT2880 pinctrl driver for RALINK/Mediatek SOCs"
select PINMUX
select GENERIC_PINCONF
endmenu
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
ccflags-y += -I$(srctree)/drivers/pinctrl
......@@ -20,8 +20,8 @@
#include <asm/mach-ralink/pinmux.h>
#include <asm/mach-ralink/mt7620.h>
#include "core.h"
#include "pinctrl-utils.h"
#include "../core.h"
#include "../pinctrl-utils.h"
#define SYSC_REG_GPIO_MODE 0x60
#define SYSC_REG_GPIO_MODE2 0x64
......
......@@ -94,8 +94,6 @@ source "drivers/staging/mt7621-pci/Kconfig"
source "drivers/staging/mt7621-pci-phy/Kconfig"
source "drivers/staging/mt7621-pinctrl/Kconfig"
source "drivers/staging/mt7621-dma/Kconfig"
source "drivers/staging/ralink-gdma/Kconfig"
......
......@@ -37,7 +37,6 @@ obj-$(CONFIG_BCM2835_VCHIQ) += vc04_services/
obj-$(CONFIG_PI433) += pi433/
obj-$(CONFIG_PCI_MT7621) += mt7621-pci/
obj-$(CONFIG_PCI_MT7621_PHY) += mt7621-pci-phy/
obj-$(CONFIG_PINCTRL_RT2880) += mt7621-pinctrl/
obj-$(CONFIG_SOC_MT7621) += mt7621-dma/
obj-$(CONFIG_DMA_RALINK) += ralink-gdma/
obj-$(CONFIG_SOC_MT7621) += mt7621-dts/
......
# SPDX-License-Identifier: GPL-2.0
config PINCTRL_RT2880
bool "RT2800 pinctrl driver for RALINK/Mediatek SOCs"
depends on RALINK
select PINMUX
select GENERIC_PINCONF
- general code review and cleanup
- should probably be always selected by 'config RALINK'
- ensure device-tree requirements are documented
Cc: NeilBrown <neil@brown.name>
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