Commit 51e9874d authored by Stephen Boyd's avatar Stephen Boyd Committed by Bjorn Andersson

arm64: dts: qcom: sc7180: Drop flags on mdss irqs

The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two
where the second cell is the irq flags. Drop the second cell to match
the binding.

Cc: Kalyan Thota <kalyan_t@codeaurora.org>
Cc: Harigovindan P <harigovi@codeaurora.org
Fixes: a3db7ad1 ("arm64: dts: sc7180: add display dt nodes")
Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200811192503.1811462-1-swboyd@chromium.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 5f854f09
...@@ -2848,7 +2848,7 @@ mdp: mdp@ae01000 { ...@@ -2848,7 +2848,7 @@ mdp: mdp@ae01000 {
power-domains = <&rpmhpd SC7180_CX>; power-domains = <&rpmhpd SC7180_CX>;
interrupt-parent = <&mdss>; interrupt-parent = <&mdss>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0>;
status = "disabled"; status = "disabled";
...@@ -2896,7 +2896,7 @@ dsi0: dsi@ae94000 { ...@@ -2896,7 +2896,7 @@ dsi0: dsi@ae94000 {
reg-names = "dsi_ctrl"; reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>; interrupt-parent = <&mdss>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
......
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