ASoC: dwc: i2s: Add StarFive JH7110 SoC support

Add StarFive JH7110(TX0/TX1/RX channels) SoC support in the
designware I2S driver and a flag to check if it is on the JH7110 SoC.

These channels need to enable clocks, resets and syscon register on the
JH7110 SoC. So add init ops in platform data for the JH7110 SoC to do this.

Their resets should be deassert before changing the parent of clocks so
these are done in the init ops of platform data.

The I2S controllers use DMA controller by platform data on the JH7110
and their settings about snd_dmaengine_dai_dma_data() should be added
in the dw_configure_dai_by_pd(). And use dmaengine PCM registration if
these do not have IRQ on the JH7110 SoC.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Link: https://lore.kernel.org/r/20230821144151.207339-4-xingyu.wu@starfivetech.comSigned-off-by: Mark Brown <broonie@kernel.org>

include/sound/designware_i2s.h

@@ -21,6 +21,8 @@ struct i2s_clk_config_data {
 	u32 sample_rate;
 };
 
+struct dw_i2s_dev;
+
 struct i2s_platform_data {
 	#define DWC_I2S_PLAY	(1 << 0)
 	#define DWC_I2S_RECORD	(1 << 1)
@@ -42,6 +44,7 @@ struct i2s_platform_data {
 	void *capture_dma_data;
 	bool (*filter)(struct dma_chan *chan, void *slave);
 	int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
+	int (*i2s_pd_init)(struct dw_i2s_dev *dev);
 };
 
 struct i2s_dma_data {

sound/soc/dwc/local.h

@@ -123,6 +123,7 @@ struct dw_i2s_dev {
 	u32 fifo_th;
 	u32 l_reg;
 	u32 r_reg;
+	bool is_jh7110; /* Flag for StarFive JH7110 SoC */
 
 	/* data related to DMA transfers b/w i2s and DMAC */
 	union dw_i2s_snd_dma_data play_dma_data;