ASoC: Intel: sof_da7219: add rpl_mx98360_da7219 board config
This configuration supports RPL boards which implement DA7219 on SSP0 and MAX98360A on SSP1. DA7219 uses PLL bypass mode to avoid WCLK locking problem. To use this mode, the MCLK frequency must be 12.288 or 24.576MHz in the topology binary. Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Brent Lu <brent.lu@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://msgid.link/r/20240325221059.206042-5-pierre-louis.bossart@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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