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Commit 55201afd authored by Mark Brown's avatar Mark Brown
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spi: pxa2xx: Pass the SSP type via device property 

Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>:

Currently the SPI PXA2xx devices on Intel platforms can be instantiated
via the following paths:
 1) as ACPI LPSS device on Haswell, Bay Trail and Cherry Trail;
 2) as ACPI LPSS device on the Sky Lake and newer;
 3) as PCI LPSS device on Haswell, Bay Trail and Cherry Trail;
 4) as PCI LPSS device on the Sky Lake and newer;
 5) as PCI device via ID table.

Each of these cases provides some platform related data differently,
i.e.:
 1) via drivers/acpi/acpi_lpss.c and drivers/spi/spi-pxa2xx.c
 2) via drivers/mfd/intel-lpss-acpi.c
 3) via drivers/spi/spi-pxa2xx-pci.c
 4) via drivers/mfd/intel-lpss-pci.c and drivers/spi/spi-pxa2xx.c
 5) via drivers/spi/spi-pxa2xx-pci.c

This approach has two downsides:

a) there is no data propagated in the case #2 because we can't have
   two or more drivers to match the same ACPI ID and hence some cases
   are still not supported (Sky Lake and newer ACPI enabled LPSS);

b) the data is duplicated over two drivers in the cases #1 & #4 and,
   besides to be a bloatware, it is error prone (e.g. Lakefield has
   a wrong data right now due to missed PCI entry in the spi-pxa2xx.c).

This series fixes the downsides, and enables previously unsupported
cases.
parents 6d0cebbd 0e1f0b1c
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Showing with 37 additions and 135 deletions
drivers/spi/spi-pxa2xx.c
View file @ 55201afd
...@@ -20,7 +20,6 @@ ...@@ -20,7 +20,6 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/mod_devicetable.h> #include <linux/mod_devicetable.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/pci.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/property.h> #include <linux/property.h>
...@@ -1322,134 +1321,11 @@ static void cleanup(struct spi_device *spi) ...@@ -1322,134 +1321,11 @@ static void cleanup(struct spi_device *spi)
kfree(chip); kfree(chip);
} }
#ifdef CONFIG_ACPI
static const struct acpi_device_id pxa2xx_spi_acpi_match[] = {
{ "INT33C0", LPSS_LPT_SSP },
{ "INT33C1", LPSS_LPT_SSP },
{ "INT3430", LPSS_LPT_SSP },
{ "INT3431", LPSS_LPT_SSP },
{ "80860F0E", LPSS_BYT_SSP },
{ "8086228E", LPSS_BSW_SSP },
{ },
};
MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match);
#endif
/*
* PCI IDs of compound devices that integrate both host controller and private
* integrated DMA engine. Please note these are not used in module
* autoloading and probing in this module but matching the LPSS SSP type.
*/
static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
/* SPT-LP */
{ PCI_VDEVICE(INTEL, 0x9d29), LPSS_SPT_SSP },
{ PCI_VDEVICE(INTEL, 0x9d2a), LPSS_SPT_SSP },
/* SPT-H */
{ PCI_VDEVICE(INTEL, 0xa129), LPSS_SPT_SSP },
{ PCI_VDEVICE(INTEL, 0xa12a), LPSS_SPT_SSP },
/* KBL-H */
{ PCI_VDEVICE(INTEL, 0xa2a9), LPSS_SPT_SSP },
{ PCI_VDEVICE(INTEL, 0xa2aa), LPSS_SPT_SSP },
/* CML-V */
{ PCI_VDEVICE(INTEL, 0xa3a9), LPSS_SPT_SSP },
{ PCI_VDEVICE(INTEL, 0xa3aa), LPSS_SPT_SSP },
/* BXT A-Step */
{ PCI_VDEVICE(INTEL, 0x0ac2), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x0ac4), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x0ac6), LPSS_BXT_SSP },
/* BXT B-Step */
{ PCI_VDEVICE(INTEL, 0x1ac2), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x1ac4), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x1ac6), LPSS_BXT_SSP },
/* GLK */
{ PCI_VDEVICE(INTEL, 0x31c2), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x31c4), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x31c6), LPSS_BXT_SSP },
/* ICL-LP */
{ PCI_VDEVICE(INTEL, 0x34aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x34ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x34fb), LPSS_CNL_SSP },
/* EHL */
{ PCI_VDEVICE(INTEL, 0x4b2a), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x4b2b), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x4b37), LPSS_BXT_SSP },
/* JSL */
{ PCI_VDEVICE(INTEL, 0x4daa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x4dab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x4dfb), LPSS_CNL_SSP },
/* TGL-H */
{ PCI_VDEVICE(INTEL, 0x43aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x43ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x43fb), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x43fd), LPSS_CNL_SSP },
/* ADL-P */
{ PCI_VDEVICE(INTEL, 0x51aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x51ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x51fb), LPSS_CNL_SSP },
/* ADL-M */
{ PCI_VDEVICE(INTEL, 0x54aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x54ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x54fb), LPSS_CNL_SSP },
/* APL */
{ PCI_VDEVICE(INTEL, 0x5ac2), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x5ac4), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x5ac6), LPSS_BXT_SSP },
/* RPL-S */
{ PCI_VDEVICE(INTEL, 0x7a2a), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7a2b), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7a79), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7a7b), LPSS_CNL_SSP },
/* ADL-S */
{ PCI_VDEVICE(INTEL, 0x7aaa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7aab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7af9), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7afb), LPSS_CNL_SSP },
/* MTL-P */
{ PCI_VDEVICE(INTEL, 0x7e27), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7e30), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x7e46), LPSS_CNL_SSP },
/* CNL-LP */
{ PCI_VDEVICE(INTEL, 0x9daa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x9dab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x9dfb), LPSS_CNL_SSP },
/* CNL-H */
{ PCI_VDEVICE(INTEL, 0xa32a), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa32b), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa37b), LPSS_CNL_SSP },
/* CML-LP */
{ PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP },
/* CML-H */
{ PCI_VDEVICE(INTEL, 0x06aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x06ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x06fb), LPSS_CNL_SSP },
/* TGL-LP */
{ PCI_VDEVICE(INTEL, 0xa0aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0de), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0df), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0fb), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0fd), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0fe), LPSS_CNL_SSP },
{ },
};
static const struct of_device_id pxa2xx_spi_of_match[] = {
{ .compatible = "marvell,mmp2-ssp", .data = (void *)MMP2_SSP },
{},
};
MODULE_DEVICE_TABLE(of, pxa2xx_spi_of_match);
#ifdef CONFIG_PCI
static bool pxa2xx_spi_idma_filter(struct dma_chan *chan, void *param) static bool pxa2xx_spi_idma_filter(struct dma_chan *chan, void *param)
{ {
return param == chan->device->dev; return param == chan->device->dev;
} }
#endif /* CONFIG_PCI */
static struct pxa2xx_spi_controller * static struct pxa2xx_spi_controller *
pxa2xx_spi_init_pdata(struct platform_device *pdev) pxa2xx_spi_init_pdata(struct platform_device *pdev)
{ {
...@@ -1458,22 +1334,29 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) ...@@ -1458,22 +1334,29 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev)
struct device *parent = dev->parent; struct device *parent = dev->parent;
struct ssp_device *ssp; struct ssp_device *ssp;
struct resource *res; struct resource *res;
struct pci_dev *pcidev = dev_is_pci(parent) ? to_pci_dev(parent) : NULL; enum pxa_ssp_type type = SSP_UNDEFINED;
const struct pci_device_id *pcidev_id = NULL;
enum pxa_ssp_type type;
const void *match; const void *match;
bool is_lpss_priv;
int status; int status;
u64 uid; u64 uid;
if (pcidev) is_lpss_priv = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpss_priv");
pcidev_id = pci_match_id(pxa2xx_spi_pci_compound_match, pcidev);
match = device_get_match_data(dev); match = device_get_match_data(dev);
if (match) if (match)
type = (enum pxa_ssp_type)match; type = (enum pxa_ssp_type)match;
else if (pcidev_id) else if (is_lpss_priv) {
type = (enum pxa_ssp_type)pcidev_id->driver_data; u32 value;
else
status = device_property_read_u32(dev, "intel,spi-pxa2xx-type", &value);
if (status)
return ERR_PTR(status);
type = (enum pxa_ssp_type)value;
}
/* Validate the SSP type correctness */
if (!(type > SSP_UNDEFINED && type < SSP_MAX))
return ERR_PTR(-EINVAL); return ERR_PTR(-EINVAL);
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
...@@ -1488,13 +1371,12 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) ...@@ -1488,13 +1371,12 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev)
ssp->phys_base = res->start; ssp->phys_base = res->start;
#ifdef CONFIG_PCI /* Platforms with iDMA 64-bit */
if (pcidev_id) { if (is_lpss_priv) {
pdata->tx_param = parent; pdata->tx_param = parent;
pdata->rx_param = parent; pdata->rx_param = parent;
pdata->dma_filter = pxa2xx_spi_idma_filter; pdata->dma_filter = pxa2xx_spi_idma_filter;
} }
#endif
ssp->clk = devm_clk_get(dev, NULL); ssp->clk = devm_clk_get(dev, NULL);
if (IS_ERR(ssp->clk)) if (IS_ERR(ssp->clk))
...@@ -1861,6 +1743,25 @@ static const struct dev_pm_ops pxa2xx_spi_pm_ops = { ...@@ -1861,6 +1743,25 @@ static const struct dev_pm_ops pxa2xx_spi_pm_ops = {
RUNTIME_PM_OPS(pxa2xx_spi_runtime_suspend, pxa2xx_spi_runtime_resume, NULL) RUNTIME_PM_OPS(pxa2xx_spi_runtime_suspend, pxa2xx_spi_runtime_resume, NULL)
}; };
#ifdef CONFIG_ACPI
static const struct acpi_device_id pxa2xx_spi_acpi_match[] = {
{ "80860F0E", LPSS_BYT_SSP },
{ "8086228E", LPSS_BSW_SSP },
{ "INT33C0", LPSS_LPT_SSP },
{ "INT33C1", LPSS_LPT_SSP },
{ "INT3430", LPSS_LPT_SSP },
{ "INT3431", LPSS_LPT_SSP },
{}
};
MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match);
#endif
static const struct of_device_id pxa2xx_spi_of_match[] = {
{ .compatible = "marvell,mmp2-ssp", .data = (void *)MMP2_SSP },
{}
};
MODULE_DEVICE_TABLE(of, pxa2xx_spi_of_match);
static struct platform_driver driver = { static struct platform_driver driver = {
.driver = { .driver = {
.name = "pxa2xx-spi", .name = "pxa2xx-spi",
......
include/linux/pxa2xx_ssp.h
View file @ 55201afd
...@@ -229,6 +229,7 @@ enum pxa_ssp_type { ...@@ -229,6 +229,7 @@ enum pxa_ssp_type {
LPSS_SPT_SSP, LPSS_SPT_SSP,
LPSS_BXT_SSP, LPSS_BXT_SSP,
LPSS_CNL_SSP, LPSS_CNL_SSP,
SSP_MAX
}; };
struct ssp_device { struct ssp_device {
......
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