Commit 55c68261 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven

arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI

Move extal and memory nodes to SOM DTSI.
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210922212049.19851-2-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 5e8c83b3
......@@ -7,15 +7,10 @@
/dts-v1/;
#include "r9a07g044l2.dtsi"
#include "rzg2l-smarc-som.dtsi"
#include "rzg2l-smarc.dtsi"
/ {
model = "Renesas SMARC EVK based on r9a07g044l2";
compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2L SMARC SOM common parts
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/ {
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};
&extal_clk {
clock-frequency = <24000000>;
};
......@@ -89,10 +89,6 @@ &ehci1 {
status = "okay";
};
&extal_clk {
clock-frequency = <24000000>;
};
&hsusb {
dr_mode = "otg";
status = "okay";
......
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