Commit 55cdd2ec authored by Shreeya Patel's avatar Shreeya Patel Committed by Jonathan Cameron

Staging: iio: adis16209: Indent the field definitions

Have indentation in field definitions to make them
clearly different from the register addresses.
Signed-off-by: default avatarShreeya Patel <shreeya.patel23498@gmail.com>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent d12ceffd
...@@ -71,13 +71,13 @@ ...@@ -71,13 +71,13 @@
#define ADIS16209_STAT_REG 0x3C #define ADIS16209_STAT_REG 0x3C
#define ADIS16209_STAT_ALARM2 BIT(9) #define ADIS16209_STAT_ALARM2 BIT(9)
#define ADIS16209_STAT_ALARM1 BIT(8) #define ADIS16209_STAT_ALARM1 BIT(8)
#define ADIS16209_STAT_SELFTEST_FAIL_BIT 5 #define ADIS16209_STAT_SELFTEST_FAIL_BIT 5
#define ADIS16209_STAT_SPI_FAIL_BIT 3 #define ADIS16209_STAT_SPI_FAIL_BIT 3
#define ADIS16209_STAT_FLASH_UPT_FAIL_BIT 2 #define ADIS16209_STAT_FLASH_UPT_FAIL_BIT 2
/* Power supply above 3.625 V */ /* Power supply above 3.625 V */
#define ADIS16209_STAT_POWER_HIGH_BIT 1 #define ADIS16209_STAT_POWER_HIGH_BIT 1
/* Power supply below 3.15 V */ /* Power supply below 3.15 V */
#define ADIS16209_STAT_POWER_LOW_BIT 0 #define ADIS16209_STAT_POWER_LOW_BIT 0
#define ADIS16209_CMD_REG 0x3E #define ADIS16209_CMD_REG 0x3E
#define ADIS16209_CMD_SW_RESET BIT(7) #define ADIS16209_CMD_SW_RESET BIT(7)
......
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