Commit 5621caac authored by Rob Herring's avatar Rob Herring

ARM: kill off __mem_pci

__mem_pci is only used to enable readl/writel and friends. Just condition
this on readl being defined and remove all the __mem_pci defines.
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Stephen Warren <swarren@nvidia.com>
parent 4d5fc58d
...@@ -118,7 +118,6 @@ static inline void __iomem *__typesafe_io(unsigned long addr) ...@@ -118,7 +118,6 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
#include <mach/io.h> #include <mach/io.h>
#else #else
#define __io(a) ({ (void)(a); __typesafe_io(0); }) #define __io(a) ({ (void)(a); __typesafe_io(0); })
#define __mem_pci(a) (a)
#endif #endif
/* /*
...@@ -221,18 +220,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t); ...@@ -221,18 +220,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
* Again, this are defined to perform little endian accesses. See the * Again, this are defined to perform little endian accesses. See the
* IO port primitives for more information. * IO port primitives for more information.
*/ */
#ifdef __mem_pci #ifndef readl
#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; }) #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
__raw_readw(__mem_pci(c))); __r; }) __raw_readw(c)); __r; })
#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
__raw_readl(__mem_pci(c))); __r; }) __raw_readl(c)); __r; })
#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) #define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
cpu_to_le16(v),__mem_pci(c))) cpu_to_le16(v),c))
#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
cpu_to_le32(v),__mem_pci(c))) cpu_to_le32(v),c))
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
...@@ -242,30 +241,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t); ...@@ -242,30 +241,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) #define readsb(p,d,l) __raw_readsb(p,d,l)
#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) #define readsw(p,d,l) __raw_readsw(p,d,l)
#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) #define readsl(p,d,l) __raw_readsl(p,d,l)
#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) #define writesb(p,d,l) __raw_writesb(p,d,l)
#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) #define writesw(p,d,l) __raw_writesw(p,d,l)
#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) #define writesl(p,d,l) __raw_writesl(p,d,l)
#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) #define memset_io(c,v,l) _memset_io(c,(v),(l))
#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) #define memcpy_fromio(a,c,l) _memcpy_fromio((a),c,(l))
#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) #define memcpy_toio(c,a,l) _memcpy_toio(c,(a),(l))
#elif !defined(readb) #endif /* readl */
#define readb(c) (__readwrite_bug("readb"),0)
#define readw(c) (__readwrite_bug("readw"),0)
#define readl(c) (__readwrite_bug("readl"),0)
#define writeb(v,c) __readwrite_bug("writeb")
#define writew(v,c) __readwrite_bug("writew")
#define writel(v,c) __readwrite_bug("writel")
#define check_signature(io,sig,len) (0)
#endif /* __mem_pci */
/* /*
* ioremap and friends. * ioremap and friends.
......
...@@ -15,6 +15,5 @@ ...@@ -15,6 +15,5 @@
#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \ #define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
DOVE_PCIE0_IO_VIRT_BASE)) DOVE_PCIE0_IO_VIRT_BASE))
#define __mem_pci(a) (a)
#endif #endif
...@@ -27,18 +27,5 @@ ...@@ -27,18 +27,5 @@
* Translation of various region addresses to virtual addresses * Translation of various region addresses to virtual addresses
*/ */
#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) #define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#if 1
#define __mem_pci(a) (a)
#else
static inline void __iomem *___mem_pci(void __iomem *p)
{
unsigned long a = (unsigned long)p;
BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
return p;
}
#define __mem_pci(a) ___mem_pci(a)
#endif
#endif #endif
...@@ -29,6 +29,5 @@ ...@@ -29,6 +29,5 @@
#define PCI_IO_VADDR 0xee000000 #define PCI_IO_VADDR 0xee000000
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
#define __mem_pci(a) (a)
#endif #endif
...@@ -22,8 +22,6 @@ ...@@ -22,8 +22,6 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __iop13xx_io(a) #define __io(a) __iop13xx_io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
extern void __iomem * __iop13xx_io(unsigned long io_addr); extern void __iomem * __iop13xx_io(unsigned long io_addr);
......
...@@ -15,6 +15,5 @@ ...@@ -15,6 +15,5 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
#define __mem_pci(a) (a)
#endif #endif
...@@ -15,6 +15,5 @@ ...@@ -15,6 +15,5 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
#define __mem_pci(a) (a)
#endif #endif
...@@ -18,7 +18,6 @@ ...@@ -18,7 +18,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) (a)
/* /*
* The A? revisions of the IXP2000s assert byte lanes for PCI I/O * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
......
...@@ -18,6 +18,5 @@ ...@@ -18,6 +18,5 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) #define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
#define __mem_pci(a) (a)
#endif #endif
...@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); ...@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
* but in some cases the performance hit is acceptable. In addition, you * but in some cases the performance hit is acceptable. In addition, you
* cannot mmap() PCI devices in this case. * cannot mmap() PCI devices in this case.
*/ */
#ifndef CONFIG_IXP4XX_INDIRECT_PCI #ifdef CONFIG_IXP4XX_INDIRECT_PCI
#define __mem_pci(a) (a)
#else
/* /*
* In the case of using indirect PCI, we simply return the actual PCI * In the case of using indirect PCI, we simply return the actual PCI
......
...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr) ...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
} }
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a)
#endif #endif
...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr) ...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
} }
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a)
#endif #endif
...@@ -28,9 +28,4 @@ ...@@ -28,9 +28,4 @@
*/ */
#define __io(a) (PCIO_BASE + ((a) << 2)) #define __io(a) (PCIO_BASE + ((a) << 2))
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) (x)
#endif #endif
...@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"") ...@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"")
#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) #define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) #define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l)
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) (x)
#endif #endif
...@@ -15,6 +15,4 @@ ...@@ -15,6 +15,4 @@
#define __io(a) ((void __iomem *)(0xe0000000 + (a))) #define __io(a) ((void __iomem *)(0xe0000000 + (a)))
#define __mem_pci(addr) (addr)
#endif #endif
...@@ -40,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr) ...@@ -40,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr)
#endif #endif
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a)
#endif #endif
......
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