Commit 57e3bbd2 authored by Shubhrajyoti Datta's avatar Shubhrajyoti Datta Committed by Stephen Boyd

clk: zynqmp: pll: Remove the limit

The range is taken care in the zynqmp_pll_round_rate. Remove the rate range
in the zynqmp_clk_register_pll() to prevent the early truncation of the
frequencies and also allow multiple combinations of child and parent to get
more accurate rates.
Signed-off-by: default avatarShubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Link: https://lore.kernel.org/r/20230324104958.25099-1-shubhrajyoti.datta@amd.comSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent fe15c26e
......@@ -341,7 +341,5 @@ struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
return ERR_PTR(ret);
}
clk_hw_set_rate_range(hw, PS_PLL_VCO_MIN, PS_PLL_VCO_MAX);
return hw;
}
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