Commit 57eb06e5 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4634/1: DaVinci GPIO header build fix
  [ARM] 4636/1: pxa: add default configuration for zylonite
  [ARM] 4635/1: pxa: Change Eric Miao's email address to eric.miao@marvell.com
  [ARM] Fix assignment instead of condition in arm/mach-omap2/clock.c
  [ARM] nommu: fix breakage caused by f9720205
  [ARM] pxa: shut up CLOCK_EVT_MODE_RESUME warning
  [ARM] Fix FIQ issue with ARM926
  [ARM] Fix pxamci regression
  [ARM] Fix netx_defconfig regression
  [ARM] Fix ateb9200_defconfig build regression
  [ARM] Fix an rpc_defconfig regression
  [ARM] Fix omap_h2_1610_defconfig regressions
  [ARM] 4632/1: Fix a typo in include/asm-arm/plat-s3c/regs-nand.h
parents 2ed45b07 558de8a7
This diff is collapsed.
...@@ -190,15 +190,15 @@ struct xc *request_xc(int xcno, struct device *dev) ...@@ -190,15 +190,15 @@ struct xc *request_xc(int xcno, struct device *dev)
goto exit; goto exit;
if (!request_mem_region if (!request_mem_region
(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, dev->kobj.name)) (NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, kobject_name(dev->kobj)))
goto exit_free; goto exit_free;
if (!request_mem_region if (!request_mem_region
(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, dev->kobj.name)) (NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, kobject_name(dev->kobj)))
goto exit_release_1; goto exit_release_1;
if (!request_mem_region if (!request_mem_region
(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, dev->kobj.name)) (SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, kobject_name(dev->kobj)))
goto exit_release_2; goto exit_release_2;
x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno)); x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno));
......
...@@ -343,6 +343,7 @@ static struct platform_device *h2_devices[] __initdata = { ...@@ -343,6 +343,7 @@ static struct platform_device *h2_devices[] __initdata = {
&h2_mcbsp1_device, &h2_mcbsp1_device,
}; };
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata h2_i2c_board_info[] = { static struct i2c_board_info __initdata h2_i2c_board_info[] = {
{ {
I2C_BOARD_INFO("tps65010", 0x48), I2C_BOARD_INFO("tps65010", 0x48),
...@@ -356,6 +357,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = { ...@@ -356,6 +357,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = {
* - ... etc * - ... etc
*/ */
}; };
#endif
static void __init h2_init_smc91x(void) static void __init h2_init_smc91x(void)
{ {
...@@ -467,8 +469,10 @@ static void __init h2_init(void) ...@@ -467,8 +469,10 @@ static void __init h2_init(void)
if (gpio_request(58, "tps65010") == 0) if (gpio_request(58, "tps65010") == 0)
gpio_direction_input(58); gpio_direction_input(58);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(1, h2_i2c_board_info, i2c_register_board_info(1, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info)); ARRAY_SIZE(h2_i2c_board_info));
#endif
} }
static void __init h2_map_io(void) static void __init h2_map_io(void)
......
...@@ -651,7 +651,7 @@ static u32 omap2_get_clksel(u32 *div_sel, u32 *field_mask, ...@@ -651,7 +651,7 @@ static u32 omap2_get_clksel(u32 *div_sel, u32 *field_mask,
break; break;
case CM_SYSCLKOUT_SEL1: case CM_SYSCLKOUT_SEL1:
div_addr = (u32)&PRCM_CLKOUT_CTRL; div_addr = (u32)&PRCM_CLKOUT_CTRL;
if ((div_off == 3) || (div_off = 11)) if ((div_off == 3) || (div_off == 11))
mask= 0x3; mask= 0x3;
break; break;
case CM_CORE_SEL1: case CM_CORE_SEL1:
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* *
* Copyright (C) 2007 Marvell Internation Ltd. * Copyright (C) 2007 Marvell Internation Ltd.
* *
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* *
* Copyright (C) 2007 Marvell Internation Ltd. * Copyright (C) 2007 Marvell Internation Ltd.
* *
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* *
* Copyright (C) 2007 Marvell Internation Ltd. * Copyright (C) 2007 Marvell Internation Ltd.
* *
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* *
* Copyright (C) 2006 Marvell International Ltd. * Copyright (C) 2006 Marvell International Ltd.
* *
* 2007-09-02: eric miao <eric.y.miao@gmail.com> * 2007-09-02: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -151,6 +151,9 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) ...@@ -151,6 +151,9 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
OIER &= ~OIER_E0; OIER &= ~OIER_E0;
raw_local_irq_restore(irqflags); raw_local_irq_restore(irqflags);
break; break;
case CLOCK_EVT_MODE_RESUME:
break;
} }
} }
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* *
* Copyright (C) 2006 Marvell International Ltd. * Copyright (C) 2006 Marvell International Ltd.
* *
* 2007-09-04: eric miao <eric.y.miao@gmail.com> * 2007-09-04: eric miao <eric.miao@marvell.com>
* rewrite to align with latest kernel * rewrite to align with latest kernel
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* PXA3xx Development Platform (aka Zylonite) * PXA3xx Development Platform (aka Zylonite)
* *
* Copyright (C) 2007 Marvell Internation Ltd. * Copyright (C) 2007 Marvell Internation Ltd.
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* PXA3xx Development Platform (aka Zylonite) * PXA3xx Development Platform (aka Zylonite)
* *
* Copyright (C) 2007 Marvell Internation Ltd. * Copyright (C) 2007 Marvell Internation Ltd.
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -105,9 +105,13 @@ ENTRY(cpu_arm926_do_idle) ...@@ -105,9 +105,13 @@ ENTRY(cpu_arm926_do_idle)
mrc p15, 0, r1, c1, c0, 0 @ Read control register mrc p15, 0, r1, c1, c0, 0 @ Read control register
mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer
bic r2, r1, #1 << 12 bic r2, r1, #1 << 12
mrs r3, cpsr @ Disable FIQs while Icache
orr ip, r3, #PSR_F_BIT @ is disabled
msr cpsr_c, ip
mcr p15, 0, r2, c1, c0, 0 @ Disable I cache mcr p15, 0, r2, c1, c0, 0 @ Disable I cache
mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
mcr p15, 0, r1, c1, c0, 0 @ Restore ICache enable mcr p15, 0, r1, c1, c0, 0 @ Restore ICache enable
msr cpsr_c, r3 @ Restore FIQ state
mov pc, lr mov pc, lr
/* /*
......
...@@ -39,6 +39,7 @@ ...@@ -39,6 +39,7 @@
#define DRIVER_NAME "pxa2xx-mci" #define DRIVER_NAME "pxa2xx-mci"
#define NR_SG 1 #define NR_SG 1
#define CLKRT_OFF (~0)
struct pxamci_host { struct pxamci_host {
struct mmc_host *mmc; struct mmc_host *mmc;
...@@ -371,6 +372,9 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ...@@ -371,6 +372,9 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
unsigned long rate = host->clkrate; unsigned long rate = host->clkrate;
unsigned int clk = rate / ios->clock; unsigned int clk = rate / ios->clock;
if (host->clkrt == CLKRT_OFF)
clk_enable(host->clk);
/* /*
* clk might result in a lower divisor than we * clk might result in a lower divisor than we
* desire. check for that condition and adjust * desire. check for that condition and adjust
...@@ -379,14 +383,16 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ...@@ -379,14 +383,16 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
if (rate / clk > ios->clock) if (rate / clk > ios->clock)
clk <<= 1; clk <<= 1;
host->clkrt = fls(clk) - 1; host->clkrt = fls(clk) - 1;
clk_enable(host->clk);
/* /*
* we write clkrt on the next command * we write clkrt on the next command
*/ */
} else { } else {
pxamci_stop_clock(host); pxamci_stop_clock(host);
clk_disable(host->clk); if (host->clkrt != CLKRT_OFF) {
host->clkrt = CLKRT_OFF;
clk_disable(host->clk);
}
} }
if (host->power_mode != ios->power_mode) { if (host->power_mode != ios->power_mode) {
...@@ -498,6 +504,7 @@ static int pxamci_probe(struct platform_device *pdev) ...@@ -498,6 +504,7 @@ static int pxamci_probe(struct platform_device *pdev)
host->mmc = mmc; host->mmc = mmc;
host->dma = -1; host->dma = -1;
host->pdata = pdev->dev.platform_data; host->pdata = pdev->dev.platform_data;
host->clkrt = CLKRT_OFF;
host->clk = clk_get(&pdev->dev, "MMCCLK"); host->clk = clk_get(&pdev->dev, "MMCCLK");
if (IS_ERR(host->clk)) { if (IS_ERR(host->clk)) {
......
...@@ -38,9 +38,7 @@ static inline int next_SCp(struct scsi_pointer *SCp) ...@@ -38,9 +38,7 @@ static inline int next_SCp(struct scsi_pointer *SCp)
if (ret) { if (ret) {
SCp->buffer++; SCp->buffer++;
SCp->buffers_residual--; SCp->buffers_residual--;
SCp->ptr = (char *) SCp->ptr = sg_virt(SCp->buffer);
(page_address(SCp->buffer->page) +
SCp->buffer->offset);
SCp->this_residual = SCp->buffer->length; SCp->this_residual = SCp->buffer->length;
} else { } else {
SCp->ptr = NULL; SCp->ptr = NULL;
...@@ -76,9 +74,7 @@ static inline void init_SCp(struct scsi_cmnd *SCpnt) ...@@ -76,9 +74,7 @@ static inline void init_SCp(struct scsi_cmnd *SCpnt)
SCpnt->SCp.buffer = (struct scatterlist *) SCpnt->request_buffer; SCpnt->SCp.buffer = (struct scatterlist *) SCpnt->request_buffer;
SCpnt->SCp.buffers_residual = SCpnt->use_sg - 1; SCpnt->SCp.buffers_residual = SCpnt->use_sg - 1;
SCpnt->SCp.ptr = (char *) SCpnt->SCp.ptr = sg_virt(SCpnt->SCp.buffer);
(page_address(SCpnt->SCp.buffer->page) +
SCpnt->SCp.buffer->offset);
SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length; SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
SCpnt->SCp.phase = SCpnt->request_bufflen; SCpnt->SCp.phase = SCpnt->request_bufflen;
......
...@@ -130,4 +130,7 @@ extern u8 at91_leds_cpu; ...@@ -130,4 +130,7 @@ extern u8 at91_leds_cpu;
extern u8 at91_leds_timer; extern u8 at91_leds_timer;
extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
/* FIXME: this needs a better location, but gets stuff building again */
extern int at91_suspend_entering_slow_clock(void);
#endif #endif
...@@ -13,6 +13,9 @@ ...@@ -13,6 +13,9 @@
#ifndef __DAVINCI_GPIO_H #ifndef __DAVINCI_GPIO_H
#define __DAVINCI_GPIO_H #define __DAVINCI_GPIO_H
#include <linux/io.h>
#include <asm/hardware.h>
/* /*
* basic gpio routines * basic gpio routines
* *
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* PXA300/PXA310 specific MFP configuration definitions * PXA300/PXA310 specific MFP configuration definitions
* *
* Copyright (C) 2007 Marvell International Ltd. * Copyright (C) 2007 Marvell International Ltd.
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* PXA320 specific MFP configuration definitions * PXA320 specific MFP configuration definitions
* *
* Copyright (C) 2007 Marvell International Ltd. * Copyright (C) 2007 Marvell International Ltd.
* 2007-08-21: eric miao <eric.y.miao@gmail.com> * 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* *
* Copyright (C) 2007 Marvell International Ltd. * Copyright (C) 2007 Marvell International Ltd.
* *
* 2007-8-21: eric miao <eric.y.miao@gmail.com> * 2007-8-21: eric miao <eric.miao@marvell.com>
* initial version * initial version
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
......
...@@ -11,8 +11,9 @@ ...@@ -11,8 +11,9 @@
#define flat_argvp_envp_on_stack() 1 #define flat_argvp_envp_on_stack() 1
#define flat_old_ram_flag(flags) (flags) #define flat_old_ram_flag(flags) (flags)
#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
#define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp) #define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp)
#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) #define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
#define flat_get_relocate_addr(rel) (rel) #define flat_get_relocate_addr(rel) (rel)
#define flat_set_persistent(relval, p) 0
#endif /* __ARM_FLAT_H__ */ #endif /* __ARM_FLAT_H__ */
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28) #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
#define S3C2440_NFMECC0 S3C2410_NFREG(0x2C) #define S3C2440_NFMECC0 S3C2410_NFREG(0x2C)
#define S3C2440_NFMECC1 S3C2410_NFREG(0x30) #define S3C2440_NFMECC1 S3C2410_NFREG(0x30)
#define S3C2440_NFSECC S3C24E10_NFREG(0x34) #define S3C2440_NFSECC S3C2410_NFREG(0x34)
#define S3C2440_NFSBLK S3C2410_NFREG(0x38) #define S3C2440_NFSBLK S3C2410_NFREG(0x38)
#define S3C2440_NFEBLK S3C2410_NFREG(0x3C) #define S3C2440_NFEBLK S3C2410_NFREG(0x3C)
......
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