Commit 583891c9 authored by Kevin Barnett's avatar Kevin Barnett Committed by Martin K. Petersen

scsi: smartpqi: Align code with oob driver

Reduce differences between out-of-box driver and kernel.org driver. No
functional changes.

Link: https://lore.kernel.org/r/161549375094.25025.9268879575316758510.stgit@brunhildaReviewed-by: default avatarScott Benesh <scott.benesh@microchip.com>
Reviewed-by: default avatarMike McGowen <mike.mcgowen@microchip.com>
Reviewed-by: default avatarScott Teel <scott.teel@microchip.com>
Signed-off-by: default avatarKevin Barnett <kevin.barnett@microchip.com>
Signed-off-by: default avatarDon Brace <don.brace@microchip.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 598bef8d
...@@ -129,7 +129,7 @@ struct pqi_iu_header { ...@@ -129,7 +129,7 @@ struct pqi_iu_header {
__le16 iu_length; /* in bytes - does not include the length */ __le16 iu_length; /* in bytes - does not include the length */
/* of this header */ /* of this header */
__le16 response_queue_id; /* specifies the OQ where the */ __le16 response_queue_id; /* specifies the OQ where the */
/* response IU is to be delivered */ /* response IU is to be delivered */
u8 work_area[2]; /* reserved for driver use */ u8 work_area[2]; /* reserved for driver use */
}; };
...@@ -281,8 +281,7 @@ struct pqi_raid_path_request { ...@@ -281,8 +281,7 @@ struct pqi_raid_path_request {
u8 cdb[16]; u8 cdb[16];
u8 reserved6[12]; u8 reserved6[12];
__le32 timeout; __le32 timeout;
struct pqi_sg_descriptor struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
}; };
struct pqi_aio_path_request { struct pqi_aio_path_request {
...@@ -309,11 +308,11 @@ struct pqi_aio_path_request { ...@@ -309,11 +308,11 @@ struct pqi_aio_path_request {
u8 cdb_length; u8 cdb_length;
u8 lun_number[8]; u8 lun_number[8];
u8 reserved4[4]; u8 reserved4[4];
struct pqi_sg_descriptor struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
}; };
#define PQI_RAID1_NVME_XFER_LIMIT (32 * 1024) /* 32 KiB */ #define PQI_RAID1_NVME_XFER_LIMIT (32 * 1024) /* 32 KiB */
struct pqi_aio_r1_path_request { struct pqi_aio_r1_path_request {
struct pqi_iu_header header; struct pqi_iu_header header;
__le16 request_id; __le16 request_id;
...@@ -420,7 +419,7 @@ struct pqi_event_config { ...@@ -420,7 +419,7 @@ struct pqi_event_config {
#define PQI_EVENT_OFA_MEMORY_ALLOCATION 0x0 #define PQI_EVENT_OFA_MEMORY_ALLOCATION 0x0
#define PQI_EVENT_OFA_QUIESCE 0x1 #define PQI_EVENT_OFA_QUIESCE 0x1
#define PQI_EVENT_OFA_CANCELLED 0x2 #define PQI_EVENT_OFA_CANCELED 0x2
struct pqi_event_response { struct pqi_event_response {
struct pqi_iu_header header; struct pqi_iu_header header;
...@@ -725,7 +724,7 @@ struct pqi_admin_queues_aligned { ...@@ -725,7 +724,7 @@ struct pqi_admin_queues_aligned {
struct pqi_admin_queues { struct pqi_admin_queues {
void *iq_element_array; void *iq_element_array;
void *oq_element_array; void *oq_element_array;
pqi_index_t *iq_ci; pqi_index_t __iomem *iq_ci;
pqi_index_t __iomem *oq_pi; pqi_index_t __iomem *oq_pi;
dma_addr_t iq_element_array_bus_addr; dma_addr_t iq_element_array_bus_addr;
dma_addr_t oq_element_array_bus_addr; dma_addr_t oq_element_array_bus_addr;
...@@ -750,8 +749,8 @@ struct pqi_queue_group { ...@@ -750,8 +749,8 @@ struct pqi_queue_group {
dma_addr_t oq_element_array_bus_addr; dma_addr_t oq_element_array_bus_addr;
__le32 __iomem *iq_pi[2]; __le32 __iomem *iq_pi[2];
pqi_index_t iq_pi_copy[2]; pqi_index_t iq_pi_copy[2];
pqi_index_t __iomem *iq_ci[2]; pqi_index_t __iomem *iq_ci[2];
pqi_index_t __iomem *oq_pi; pqi_index_t __iomem *oq_pi;
dma_addr_t iq_ci_bus_addr[2]; dma_addr_t iq_ci_bus_addr[2];
dma_addr_t oq_pi_bus_addr; dma_addr_t oq_pi_bus_addr;
__le32 __iomem *oq_ci; __le32 __iomem *oq_ci;
...@@ -764,7 +763,7 @@ struct pqi_event_queue { ...@@ -764,7 +763,7 @@ struct pqi_event_queue {
u16 oq_id; u16 oq_id;
u16 int_msg_num; u16 int_msg_num;
void *oq_element_array; void *oq_element_array;
pqi_index_t __iomem *oq_pi; pqi_index_t __iomem *oq_pi;
dma_addr_t oq_element_array_bus_addr; dma_addr_t oq_element_array_bus_addr;
dma_addr_t oq_pi_bus_addr; dma_addr_t oq_pi_bus_addr;
__le32 __iomem *oq_ci; __le32 __iomem *oq_ci;
...@@ -835,21 +834,21 @@ struct pqi_config_table_firmware_features { ...@@ -835,21 +834,21 @@ struct pqi_config_table_firmware_features {
/* __le16 host_max_known_feature; */ /* __le16 host_max_known_feature; */
}; };
#define PQI_FIRMWARE_FEATURE_OFA 0 #define PQI_FIRMWARE_FEATURE_OFA 0
#define PQI_FIRMWARE_FEATURE_SMP 1 #define PQI_FIRMWARE_FEATURE_SMP 1
#define PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE 2 #define PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE 2
#define PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS 3 #define PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS 3
#define PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS 4 #define PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS 4
#define PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS 5 #define PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS 5
#define PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS 6 #define PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS 6
#define PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS 7 #define PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS 7
#define PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS 8 #define PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS 8
#define PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS 9 #define PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS 9
#define PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS 10 #define PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS 10
#define PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE 11 #define PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE 11
#define PQI_FIRMWARE_FEATURE_UNIQUE_SATA_WWN 12 #define PQI_FIRMWARE_FEATURE_UNIQUE_SATA_WWN 12
#define PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT 13 #define PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT 13
#define PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT 14 #define PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT 14
#define PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME 15 #define PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME 15
#define PQI_FIRMWARE_FEATURE_MAXIMUM 15 #define PQI_FIRMWARE_FEATURE_MAXIMUM 15
...@@ -1027,12 +1026,12 @@ struct pqi_scsi_dev_raid_map_data { ...@@ -1027,12 +1026,12 @@ struct pqi_scsi_dev_raid_map_data {
u8 cdb[16]; u8 cdb[16];
u8 cdb_length; u8 cdb_length;
/* RAID1 specific */ /* RAID 1 specific */
#define NUM_RAID1_MAP_ENTRIES 3 #define NUM_RAID1_MAP_ENTRIES 3
u32 num_it_nexus_entries; u32 num_it_nexus_entries;
u32 it_nexus[NUM_RAID1_MAP_ENTRIES]; u32 it_nexus[NUM_RAID1_MAP_ENTRIES];
/* RAID5 RAID6 specific */ /* RAID 5 / RAID 6 specific */
u32 p_parity_it_nexus; /* aio_handle */ u32 p_parity_it_nexus; /* aio_handle */
u32 q_parity_it_nexus; /* aio_handle */ u32 q_parity_it_nexus; /* aio_handle */
u8 xor_mult; u8 xor_mult;
...@@ -1291,8 +1290,8 @@ struct pqi_ctrl_info { ...@@ -1291,8 +1290,8 @@ struct pqi_ctrl_info {
u8 pqi_mode_enabled : 1; u8 pqi_mode_enabled : 1;
u8 pqi_reset_quiesce_supported : 1; u8 pqi_reset_quiesce_supported : 1;
u8 soft_reset_handshake_supported : 1; u8 soft_reset_handshake_supported : 1;
u8 raid_iu_timeout_supported: 1; u8 raid_iu_timeout_supported : 1;
u8 tmf_iu_timeout_supported: 1; u8 tmf_iu_timeout_supported : 1;
u8 enable_r1_writes : 1; u8 enable_r1_writes : 1;
u8 enable_r5_writes : 1; u8 enable_r5_writes : 1;
u8 enable_r6_writes : 1; u8 enable_r6_writes : 1;
......
This diff is collapsed.
...@@ -107,8 +107,7 @@ static int pqi_sas_port_add_rphy(struct pqi_sas_port *pqi_sas_port, ...@@ -107,8 +107,7 @@ static int pqi_sas_port_add_rphy(struct pqi_sas_port *pqi_sas_port,
static struct sas_rphy *pqi_sas_rphy_alloc(struct pqi_sas_port *pqi_sas_port) static struct sas_rphy *pqi_sas_rphy_alloc(struct pqi_sas_port *pqi_sas_port)
{ {
if (pqi_sas_port->device && if (pqi_sas_port->device && pqi_sas_port->device->is_expander_smp_device)
pqi_sas_port->device->is_expander_smp_device)
return sas_expander_alloc(pqi_sas_port->port, return sas_expander_alloc(pqi_sas_port->port,
SAS_FANOUT_EXPANDER_DEVICE); SAS_FANOUT_EXPANDER_DEVICE);
...@@ -161,7 +160,7 @@ static void pqi_free_sas_port(struct pqi_sas_port *pqi_sas_port) ...@@ -161,7 +160,7 @@ static void pqi_free_sas_port(struct pqi_sas_port *pqi_sas_port)
list_for_each_entry_safe(pqi_sas_phy, next, list_for_each_entry_safe(pqi_sas_phy, next,
&pqi_sas_port->phy_list_head, phy_list_entry) &pqi_sas_port->phy_list_head, phy_list_entry)
pqi_free_sas_phy(pqi_sas_phy); pqi_free_sas_phy(pqi_sas_phy);
sas_port_delete(pqi_sas_port->port); sas_port_delete(pqi_sas_port->port);
list_del(&pqi_sas_port->port_list_entry); list_del(&pqi_sas_port->port_list_entry);
...@@ -191,7 +190,7 @@ static void pqi_free_sas_node(struct pqi_sas_node *pqi_sas_node) ...@@ -191,7 +190,7 @@ static void pqi_free_sas_node(struct pqi_sas_node *pqi_sas_node)
list_for_each_entry_safe(pqi_sas_port, next, list_for_each_entry_safe(pqi_sas_port, next,
&pqi_sas_node->port_list_head, port_list_entry) &pqi_sas_node->port_list_head, port_list_entry)
pqi_free_sas_port(pqi_sas_port); pqi_free_sas_port(pqi_sas_port);
kfree(pqi_sas_node); kfree(pqi_sas_node);
} }
...@@ -498,7 +497,7 @@ static unsigned int pqi_build_sas_smp_handler_reply( ...@@ -498,7 +497,7 @@ static unsigned int pqi_build_sas_smp_handler_reply(
job->reply_len = le16_to_cpu(error_info->sense_data_length); job->reply_len = le16_to_cpu(error_info->sense_data_length);
memcpy(job->reply, error_info->data, memcpy(job->reply, error_info->data,
le16_to_cpu(error_info->sense_data_length)); le16_to_cpu(error_info->sense_data_length));
return job->reply_payload.payload_len - return job->reply_payload.payload_len -
get_unaligned_le32(&error_info->data_in_transferred); get_unaligned_le32(&error_info->data_in_transferred);
...@@ -547,6 +546,7 @@ void pqi_sas_smp_handler(struct bsg_job *job, struct Scsi_Host *shost, ...@@ -547,6 +546,7 @@ void pqi_sas_smp_handler(struct bsg_job *job, struct Scsi_Host *shost,
goto out; goto out;
reslen = pqi_build_sas_smp_handler_reply(smp_buf, job, &error_info); reslen = pqi_build_sas_smp_handler_reply(smp_buf, job, &error_info);
out: out:
bsg_job_done(job, rc, reslen); bsg_job_done(job, rc, reslen);
} }
......
...@@ -71,7 +71,7 @@ struct sis_base_struct { ...@@ -71,7 +71,7 @@ struct sis_base_struct {
/* error response data */ /* error response data */
__le32 error_buffer_element_length; /* length of each PQI error */ __le32 error_buffer_element_length; /* length of each PQI error */
/* response buffer element */ /* response buffer element */
/* in bytes */ /* in bytes */
__le32 error_buffer_num_elements; /* total number of PQI error */ __le32 error_buffer_num_elements; /* total number of PQI error */
/* response buffers available */ /* response buffers available */
}; };
...@@ -146,7 +146,7 @@ bool sis_is_firmware_running(struct pqi_ctrl_info *ctrl_info) ...@@ -146,7 +146,7 @@ bool sis_is_firmware_running(struct pqi_ctrl_info *ctrl_info)
bool sis_is_kernel_up(struct pqi_ctrl_info *ctrl_info) bool sis_is_kernel_up(struct pqi_ctrl_info *ctrl_info)
{ {
return readl(&ctrl_info->registers->sis_firmware_status) & return readl(&ctrl_info->registers->sis_firmware_status) &
SIS_CTRL_KERNEL_UP; SIS_CTRL_KERNEL_UP;
} }
u32 sis_get_product_id(struct pqi_ctrl_info *ctrl_info) u32 sis_get_product_id(struct pqi_ctrl_info *ctrl_info)
......
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