Commit 5893f4d1 authored by Xu Yilun's avatar Xu Yilun Committed by Lee Jones

mfd: intel-m10-bmc: Simplify the legacy version reg definition

The version register is the only one in the legacy I/O space to be
accessed, so it is not necessary to define the legacy base & version
register offset. A direct definition of the legacy version register
address would be fine.
Signed-off-by: default avatarXu Yilun <yilun.xu@intel.com>
Reviewed-by: default avatarTom Rix <trix@redhat.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent d9b326b2
......@@ -116,17 +116,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
int ret;
/*
* This check is to filter out the very old legacy BMC versions,
* M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
* registers. In the old BMC chips, the BMC version info is stored
* in this old version register (M10BMC_LEGACY_SYS_BASE +
* M10BMC_BUILD_VER), so its read out value would have not been
* LEGACY_INVALID (0xffffffff). But in new BMC chips that the
* driver supports, the value of this register should be
* LEGACY_INVALID.
* This check is to filter out the very old legacy BMC versions. In the
* old BMC chips, the BMC version info is stored in the old version
* register (M10BMC_LEGACY_BUILD_VER), so its read out value would have
* not been M10BMC_VER_LEGACY_INVALID (0xffffffff). But in new BMC
* chips that the driver supports, the value of this register should be
* M10BMC_VER_LEGACY_INVALID.
*/
ret = m10bmc_raw_read(ddata,
M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
if (ret)
return -ENODEV;
......
......@@ -9,7 +9,7 @@
#include <linux/regmap.h>
#define M10BMC_LEGACY_SYS_BASE 0x300400
#define M10BMC_LEGACY_BUILD_VER 0x300468
#define M10BMC_SYS_BASE 0x300800
#define M10BMC_MEM_END 0x1fffffff
......
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