Commit 5a004736 authored by Thierry Reding's avatar Thierry Reding Committed by Linus Walleij

pinctrl: tegra: Separate Tegra194 instances

Tegra194 has two separate instances of the pin controller, one called
AON (in the always-on domain) and another called "main". Instead of
treating them as a single pin controller, split them up into two
separate controllers. Doing so allows the mapping between the pinmux
and GPIO controllers to be trivial identity mappings and more cleanly
separates the AON from the main IP blocks.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20221104142345.1562750-4-thierry.reding@gmail.comSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 802e19a0
......@@ -670,19 +670,6 @@ static const struct pinconf_ops tegra_pinconf_ops = {
#endif
};
static struct pinctrl_gpio_range tegra_pinctrl_gpio_range = {
.name = "Tegra GPIOs",
.id = 0,
.base = 0,
};
static struct pinctrl_desc tegra_pinctrl_desc = {
.pctlops = &tegra_pinctrl_ops,
.pmxops = &tegra_pinmux_ops,
.confops = &tegra_pinconf_ops,
.owner = THIS_MODULE,
};
static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)
{
int i = 0;
......@@ -833,10 +820,18 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
}
}
tegra_pinctrl_gpio_range.npins = pmx->soc->ngpios;
tegra_pinctrl_desc.name = dev_name(&pdev->dev);
tegra_pinctrl_desc.pins = pmx->soc->pins;
tegra_pinctrl_desc.npins = pmx->soc->npins;
pmx->gpio_range.name = "Tegra GPIOs";
pmx->gpio_range.id = 0;
pmx->gpio_range.base = 0;
pmx->gpio_range.npins = pmx->soc->ngpios;
pmx->desc.pctlops = &tegra_pinctrl_ops;
pmx->desc.pmxops = &tegra_pinmux_ops;
pmx->desc.confops = &tegra_pinconf_ops;
pmx->desc.owner = THIS_MODULE;
pmx->desc.name = dev_name(&pdev->dev);
pmx->desc.pins = pmx->soc->pins;
pmx->desc.npins = pmx->soc->npins;
for (i = 0; ; i++) {
res = platform_get_resource(pdev, IORESOURCE_MEM, i);
......@@ -862,7 +857,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
return PTR_ERR(pmx->regs[i]);
}
pmx->pctl = devm_pinctrl_register(&pdev->dev, &tegra_pinctrl_desc, pmx);
pmx->pctl = devm_pinctrl_register(&pdev->dev, &pmx->desc, pmx);
if (IS_ERR(pmx->pctl)) {
dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
return PTR_ERR(pmx->pctl);
......@@ -871,7 +866,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
tegra_pinctrl_clear_parked_bits(pmx);
if (pmx->soc->ngpios > 0 && !tegra_pinctrl_gpio_node_has_range(pmx))
pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
pinctrl_add_gpio_range(pmx->pctl, &pmx->gpio_range);
platform_set_drvdata(pdev, pmx);
......
......@@ -15,6 +15,8 @@ struct tegra_pmx {
const struct tegra_pinctrl_soc_data *soc;
const char **group_pins;
struct pinctrl_gpio_range gpio_range;
struct pinctrl_desc desc;
int nbanks;
void __iomem **regs;
u32 *backup_regs;
......
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