Commit 5a1e843c authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mips_fixes_5.4_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fixes from Paul Burton:
 "A few MIPS fixes:

   - Fix VDSO time-related function behavior for systems where we need
     to fall back to syscalls, but were instead returning bogus results.

   - A fix to TLB exception handlers for Cavium Octeon systems where
     they would inadvertently clobber the $1/$at register.

   - A build fix for bcm63xx configurations.

   - Switch to using my @kernel.org email address"

* tag 'mips_fixes_5.4_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: tlbex: Fix build_restore_pagemask KScratch restore
  MIPS: bmips: mark exception vectors as char arrays
  mips: vdso: Fix __arch_get_hw_counter()
  MAINTAINERS: Use @kernel.org address for Paul Burton
parents 29768954 b42aa3fd
...@@ -196,7 +196,8 @@ Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de> ...@@ -196,7 +196,8 @@ Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de> Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Patrick Mochel <mochel@digitalimplant.org> Patrick Mochel <mochel@digitalimplant.org>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com> Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
Peter A Jonsson <pj@ludd.ltu.se> Peter A Jonsson <pj@ludd.ltu.se>
Peter Oruba <peter@oruba.de> Peter Oruba <peter@oruba.de>
Peter Oruba <peter.oruba@amd.com> Peter Oruba <peter.oruba@amd.com>
......
...@@ -3098,7 +3098,7 @@ S: Supported ...@@ -3098,7 +3098,7 @@ S: Supported
F: arch/arm64/net/ F: arch/arm64/net/
BPF JIT for MIPS (32-BIT AND 64-BIT) BPF JIT for MIPS (32-BIT AND 64-BIT)
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
L: bpf@vger.kernel.org L: bpf@vger.kernel.org
S: Maintained S: Maintained
...@@ -8002,7 +8002,7 @@ S: Maintained ...@@ -8002,7 +8002,7 @@ S: Maintained
F: drivers/usb/atm/ueagle-atm.c F: drivers/usb/atm/ueagle-atm.c
IMGTEC ASCII LCD DRIVER IMGTEC ASCII LCD DRIVER
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
F: drivers/auxdisplay/img-ascii-lcd.c F: drivers/auxdisplay/img-ascii-lcd.c
...@@ -10829,7 +10829,7 @@ F: drivers/usb/image/microtek.* ...@@ -10829,7 +10829,7 @@ F: drivers/usb/image/microtek.*
MIPS MIPS
M: Ralf Baechle <ralf@linux-mips.org> M: Ralf Baechle <ralf@linux-mips.org>
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
M: James Hogan <jhogan@kernel.org> M: James Hogan <jhogan@kernel.org>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
W: http://www.linux-mips.org/ W: http://www.linux-mips.org/
...@@ -10843,7 +10843,7 @@ F: arch/mips/ ...@@ -10843,7 +10843,7 @@ F: arch/mips/
F: drivers/platform/mips/ F: drivers/platform/mips/
MIPS BOSTON DEVELOPMENT BOARD MIPS BOSTON DEVELOPMENT BOARD
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/clock/img,boston-clock.txt F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
...@@ -10853,7 +10853,7 @@ F: drivers/clk/imgtec/clk-boston.c ...@@ -10853,7 +10853,7 @@ F: drivers/clk/imgtec/clk-boston.c
F: include/dt-bindings/clock/boston-clock.h F: include/dt-bindings/clock/boston-clock.h
MIPS GENERIC PLATFORM MIPS GENERIC PLATFORM
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
S: Supported S: Supported
F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
......
...@@ -84,7 +84,7 @@ void __init prom_init(void) ...@@ -84,7 +84,7 @@ void __init prom_init(void)
* Here we will start up CPU1 in the background and ask it to * Here we will start up CPU1 in the background and ask it to
* reconfigure itself then go back to sleep. * reconfigure itself then go back to sleep.
*/ */
memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20); memcpy((void *)0xa0000200, bmips_smp_movevec, 0x20);
__sync(); __sync();
set_c0_cause(C_SW0); set_c0_cause(C_SW0);
cpumask_set_cpu(1, &bmips_booted_mask); cpumask_set_cpu(1, &bmips_booted_mask);
......
...@@ -75,11 +75,11 @@ static inline int register_bmips_smp_ops(void) ...@@ -75,11 +75,11 @@ static inline int register_bmips_smp_ops(void)
#endif #endif
} }
extern char bmips_reset_nmi_vec; extern char bmips_reset_nmi_vec[];
extern char bmips_reset_nmi_vec_end; extern char bmips_reset_nmi_vec_end[];
extern char bmips_smp_movevec; extern char bmips_smp_movevec[];
extern char bmips_smp_int_vec; extern char bmips_smp_int_vec[];
extern char bmips_smp_int_vec_end; extern char bmips_smp_int_vec_end[];
extern int bmips_smp_enabled; extern int bmips_smp_enabled;
extern int bmips_cpu_offset; extern int bmips_cpu_offset;
......
...@@ -24,6 +24,8 @@ ...@@ -24,6 +24,8 @@
#define VDSO_HAS_CLOCK_GETRES 1 #define VDSO_HAS_CLOCK_GETRES 1
#define __VDSO_USE_SYSCALL ULLONG_MAX
#ifdef CONFIG_MIPS_CLOCK_VSYSCALL #ifdef CONFIG_MIPS_CLOCK_VSYSCALL
static __always_inline long gettimeofday_fallback( static __always_inline long gettimeofday_fallback(
...@@ -205,7 +207,7 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode) ...@@ -205,7 +207,7 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode)
break; break;
#endif #endif
default: default:
cycle_now = 0; cycle_now = __VDSO_USE_SYSCALL;
break; break;
} }
......
...@@ -464,10 +464,10 @@ static void bmips_wr_vec(unsigned long dst, char *start, char *end) ...@@ -464,10 +464,10 @@ static void bmips_wr_vec(unsigned long dst, char *start, char *end)
static inline void bmips_nmi_handler_setup(void) static inline void bmips_nmi_handler_setup(void)
{ {
bmips_wr_vec(BMIPS_NMI_RESET_VEC, &bmips_reset_nmi_vec, bmips_wr_vec(BMIPS_NMI_RESET_VEC, bmips_reset_nmi_vec,
&bmips_reset_nmi_vec_end); bmips_reset_nmi_vec_end);
bmips_wr_vec(BMIPS_WARM_RESTART_VEC, &bmips_smp_int_vec, bmips_wr_vec(BMIPS_WARM_RESTART_VEC, bmips_smp_int_vec,
&bmips_smp_int_vec_end); bmips_smp_int_vec_end);
} }
struct reset_vec_info { struct reset_vec_info {
......
...@@ -653,6 +653,13 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r, ...@@ -653,6 +653,13 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r,
int restore_scratch) int restore_scratch)
{ {
if (restore_scratch) { if (restore_scratch) {
/*
* Ensure the MFC0 below observes the value written to the
* KScratch register by the prior MTC0.
*/
if (scratch_reg >= 0)
uasm_i_ehb(p);
/* Reset default page size */ /* Reset default page size */
if (PM_DEFAULT_MASK >> 16) { if (PM_DEFAULT_MASK >> 16) {
uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16); uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
...@@ -667,12 +674,10 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r, ...@@ -667,12 +674,10 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r,
uasm_i_mtc0(p, 0, C0_PAGEMASK); uasm_i_mtc0(p, 0, C0_PAGEMASK);
uasm_il_b(p, r, lid); uasm_il_b(p, r, lid);
} }
if (scratch_reg >= 0) { if (scratch_reg >= 0)
uasm_i_ehb(p);
UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg); UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
} else { else
UASM_i_LW(p, 1, scratchpad_offset(0), 0); UASM_i_LW(p, 1, scratchpad_offset(0), 0);
}
} else { } else {
/* Reset default page size */ /* Reset default page size */
if (PM_DEFAULT_MASK >> 16) { if (PM_DEFAULT_MASK >> 16) {
...@@ -921,6 +926,10 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, ...@@ -921,6 +926,10 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
} }
if (mode != not_refill && check_for_high_segbits) { if (mode != not_refill && check_for_high_segbits) {
uasm_l_large_segbits_fault(l, *p); uasm_l_large_segbits_fault(l, *p);
if (mode == refill_scratch && scratch_reg >= 0)
uasm_i_ehb(p);
/* /*
* We get here if we are an xsseg address, or if we are * We get here if we are an xsseg address, or if we are
* an xuseg address above (PGDIR_SHIFT+PGDIR_BITS) boundary. * an xuseg address above (PGDIR_SHIFT+PGDIR_BITS) boundary.
...@@ -939,12 +948,10 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, ...@@ -939,12 +948,10 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
uasm_i_jr(p, ptr); uasm_i_jr(p, ptr);
if (mode == refill_scratch) { if (mode == refill_scratch) {
if (scratch_reg >= 0) { if (scratch_reg >= 0)
uasm_i_ehb(p);
UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg); UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
} else { else
UASM_i_LW(p, 1, scratchpad_offset(0), 0); UASM_i_LW(p, 1, scratchpad_offset(0), 0);
}
} else { } else {
uasm_i_nop(p); uasm_i_nop(p);
} }
......
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