Commit 5f04c4cf authored by Chanwoo Choi's avatar Chanwoo Choi Committed by Krzysztof Kozlowski

arm64: dts: exynos: Add dtsi files for Samsung Exynos5433 64bit SoC

This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
based on Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53).
Exynos5433 supports PSCI (Power State Coordination Interface) v0.1.

This patch includes following Device Tree nodes to support Exynos5433 SoC:
1. Octa cores for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Supporting PSCI v0.1

2. Clock controller nodes
- CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF  : clocks for LLI (Low Latency Interface)
- CMU_MIF   : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D   : clocks for G2D/MDMA
- CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D   : clocks for 3D Graphics Engine
- CMU_GSCL  : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
              CoreSight and L2 cache controller.
- CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.

3. Pinctrl nodes for GPIO
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad

4. Timers
- ARM architecture timer (armv8-timer)
- MCT (Multi Core Timer) timer

5. Interrupt controller (GIC-400)

6. BUS devices
- HS-I2C (High-Speed I2C) device
- SPI (Serial Peripheral Interface) device

7. Sound devices
- I2S bus
- LPASS (Low Power Audio Subsystem)

8. Power management devices
- CPUFREQ for for Cortex-A53/A57
- TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP

9. Display controller devices
- DECON (Display and enhancement controller) for panel output
- DSI (Display Serial Interface)
- MIC (Mobile Image Compressor)

10. USB
- USB 3.0 DRD (Dual Role Device) controller
- USB 3.0 Host controller

11. Storage devices
- MSHC (Mobile Storage Host Controller)

12. Misc devices
- UART devices
- ADC (Analog Digital Converter)
- PWM (Pulse Width Modulation)
- ADMA (Advanced DMA) and PDMA (Peripheral DMA)
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: default avatarJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: default avatarSeung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
Signed-off-by: default avatarJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: default avatarBeomho Seo <beomho.seo@samsung.com>
Signed-off-by: default avatarJaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: default avatarHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: default avatarInha Song <ideal.song@samsung.com>
Signed-off-by: default avatarIngi kim <ingi2.kim@samsung.com>
Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Tested-by: default avatarAndi Shyti <andi.shyti@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 1001354c
This diff is collapsed.
/*
* Device tree sources for Exynos5433 TMU sensor configuration
*
* Copyright (c) 2016 Jonghwa Lee <jonghwa3.lee@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/thermal/thermal_exynos.h>
#thermal-sensor-cells = <0>;
samsung,tmu_gain = <8>;
samsung,tmu_reference_voltage = <23>;
samsung,tmu_noise_cancel_mode = <4>;
samsung,tmu_efuse_value = <75>;
samsung,tmu_min_efuse_value = <40>;
samsung,tmu_max_efuse_value = <150>;
samsung,tmu_first_point_trim = <25>;
samsung,tmu_second_point_trim = <85>;
samsung,tmu_default_temp_offset = <50>;
samsung,tmu_mux_addr = <6>;
/*
* Device tree sources for Exynos5433 TMU sensor configuration
*
* Copyright (c) 2016 Chanwoo Choi <cw00.choi@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/thermal/thermal_exynos.h>
#thermal-sensor-cells = <0>;
samsung,tmu_gain = <8>;
samsung,tmu_reference_voltage = <16>;
samsung,tmu_noise_cancel_mode = <4>;
samsung,tmu_efuse_value = <75>;
samsung,tmu_min_efuse_value = <40>;
samsung,tmu_max_efuse_value = <150>;
samsung,tmu_first_point_trim = <25>;
samsung,tmu_second_point_trim = <85>;
samsung,tmu_default_temp_offset = <50>;
/*
* Device tree sources for Exynos5433 thermal zone
*
* Copyright (c) 2016 Chanwoo Choi <cw00.choi@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/thermal/thermal.h>
/ {
thermal-zones {
atlas0_thermal: atlas0-thermal {
thermal-sensors = <&tmu_atlas0>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {
atlas0_alert_0: atlas0-alert-0 {
temperature = <65000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas0_alert_1: atlas0-alert-1 {
temperature = <70000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas0_alert_2: atlas0-alert-2 {
temperature = <75000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas0_alert_3: atlas0-alert-3 {
temperature = <80000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas0_alert_4: atlas0-alert-4 {
temperature = <85000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas0_alert_5: atlas0-alert-5 {
temperature = <90000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas0_alert_6: atlas0-alert-6 {
temperature = <95000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
};
cooling-maps {
map0 {
/* Set maximum frequency as 1800MHz */
trip = <&atlas0_alert_0>;
cooling-device = <&cpu4 1 2>;
};
map1 {
/* Set maximum frequency as 1700MHz */
trip = <&atlas0_alert_1>;
cooling-device = <&cpu4 2 3>;
};
map2 {
/* Set maximum frequency as 1600MHz */
trip = <&atlas0_alert_2>;
cooling-device = <&cpu4 3 4>;
};
map3 {
/* Set maximum frequency as 1500MHz */
trip = <&atlas0_alert_3>;
cooling-device = <&cpu4 4 5>;
};
map4 {
/* Set maximum frequency as 1400MHz */
trip = <&atlas0_alert_4>;
cooling-device = <&cpu4 5 7>;
};
map5 {
/* Set maximum frequencyas 1200MHz */
trip = <&atlas0_alert_5>;
cooling-device = <&cpu4 7 9>;
};
map6 {
/* Set maximum frequency as 1000MHz */
trip = <&atlas0_alert_6>;
cooling-device = <&cpu4 9 14>;
};
};
};
atlas1_thermal: atlas1-thermal {
thermal-sensors = <&tmu_atlas1>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {
atlas1_alert_0: atlas1-alert-0 {
temperature = <65000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas1_alert_1: atlas1-alert-1 {
temperature = <70000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas1_alert_2: atlas1-alert-2 {
temperature = <75000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas1_alert_3: atlas1-alert-3 {
temperature = <80000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas1_alert_4: atlas1-alert-4 {
temperature = <85000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas1_alert_5: atlas1-alert-5 {
temperature = <90000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
atlas1_alert_6: atlas1-alert-6 {
temperature = <95000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
};
};
g3d_thermal: g3d-thermal {
thermal-sensors = <&tmu_g3d>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {
g3d_alert_0: g3d-alert-0 {
temperature = <70000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
g3d_alert_1: g3d-alert-1 {
temperature = <75000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
g3d_alert_2: g3d-alert-2 {
temperature = <80000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
g3d_alert_3: g3d-alert-3 {
temperature = <85000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
g3d_alert_4: g3d-alert-4 {
temperature = <90000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
g3d_alert_5: g3d-alert-5 {
temperature = <95000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
g3d_alert_6: g3d-alert-6 {
temperature = <100000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
};
};
apollo_thermal: apollo-thermal {
thermal-sensors = <&tmu_apollo>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {
apollo_alert_0: apollo-alert-0 {
temperature = <65000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
apollo_alert_1: apollo-alert-1 {
temperature = <70000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
apollo_alert_2: apollo-alert-2 {
temperature = <75000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
apollo_alert_3: apollo-alert-3 {
temperature = <80000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
apollo_alert_4: apollo-alert-4 {
temperature = <85000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
apollo_alert_5: apollo-alert-5 {
temperature = <90000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
apollo_alert_6: apollo-alert-6 {
temperature = <95000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
};
cooling-maps {
map0 {
/* Set maximum frequency as 1200MHz */
trip = <&apollo_alert_2>;
cooling-device = <&cpu0 1 2>;
};
map1 {
/* Set maximum frequency as 1100MHz */
trip = <&apollo_alert_3>;
cooling-device = <&cpu0 2 3>;
};
map2 {
/* Set maximum frequency as 1000MHz */
trip = <&apollo_alert_4>;
cooling-device = <&cpu0 3 4>;
};
map3 {
/* Set maximum frequency as 900MHz */
trip = <&apollo_alert_5>;
cooling-device = <&cpu0 4 5>;
};
map4 {
/* Set maximum frequency as 800MHz */
trip = <&apollo_alert_6>;
cooling-device = <&cpu0 5 9>;
};
};
};
isp_thermal: isp-thermal {
thermal-sensors = <&tmu_isp>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {
isp_alert_0: isp-alert-0 {
temperature = <80000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
isp_alert_1: isp-alert-1 {
temperature = <85000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
isp_alert_2: isp-alert-2 {
temperature = <90000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
isp_alert_3: isp-alert-3 {
temperature = <95000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
isp_alert_4: isp-alert-4 {
temperature = <100000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
isp_alert_5: isp-alert-5 {
temperature = <105000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
isp_alert_6: isp-alert-6 {
temperature = <110000>; /* millicelsius */
hysteresis = <1000>; /* millicelsius */
type = "active";
};
};
};
};
};
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