Commit 5fc5be30 authored by Jason D. Gaston's avatar Jason D. Gaston Committed by Deepak Saxena

[PATCH] I2C: ICH6/6300ESB i2c support

This patch adds DID support for ICH6 and 6300ESB to i2c-i801.c(SMBus).
In order to add this support I needed to patch pci_ids.h with the SMBus
DID's.  To keep things orginized I renumbered the ICH6 and ESB entries
in pci_ids.h.  I then patched the piix IDE and i810 audio drivers to
reflect the updated #define's.  I also removed an error from irq.c;
there was a reference to a 6300ESB DID that does not exist.
parent 0c8a2f9d
...@@ -479,8 +479,9 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route ...@@ -479,8 +479,9 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
case PCI_DEVICE_ID_INTEL_82801DB_0: case PCI_DEVICE_ID_INTEL_82801DB_0:
case PCI_DEVICE_ID_INTEL_82801E_0: case PCI_DEVICE_ID_INTEL_82801E_0:
case PCI_DEVICE_ID_INTEL_82801EB_0: case PCI_DEVICE_ID_INTEL_82801EB_0:
case PCI_DEVICE_ID_INTEL_ESB_0: case PCI_DEVICE_ID_INTEL_ESB_1:
case PCI_DEVICE_ID_INTEL_ICH6_0: case PCI_DEVICE_ID_INTEL_ICH6_0:
case PCI_DEVICE_ID_INTEL_ICH6_1:
r->name = "PIIX/ICH"; r->name = "PIIX/ICH";
r->get = pirq_piix_get; r->get = pirq_piix_get;
r->set = pirq_piix_set; r->set = pirq_piix_set;
......
...@@ -95,6 +95,8 @@ config I2C_I801 ...@@ -95,6 +95,8 @@ config I2C_I801
82801CA/CAM 82801CA/CAM
82801DB 82801DB
82801EB 82801EB
6300ESB
ICH6
This driver can also be built as a module. If so, the module This driver can also be built as a module. If so, the module
will be called i2c-i801. will be called i2c-i801.
......
...@@ -28,7 +28,8 @@ ...@@ -28,7 +28,8 @@
82801CA/CAM 2483 82801CA/CAM 2483
82801DB 24C3 (HW PEC supported, 32 byte buffer not supported) 82801DB 24C3 (HW PEC supported, 32 byte buffer not supported)
82801EB 24D3 (HW PEC supported, 32 byte buffer not supported) 82801EB 24D3 (HW PEC supported, 32 byte buffer not supported)
6300ESB 25A4
ICH6 266A
This driver supports several versions of Intel's I/O Controller Hubs (ICH). This driver supports several versions of Intel's I/O Controller Hubs (ICH).
For SMBus support, they are similar to the PIIX4 and are part For SMBus support, they are similar to the PIIX4 and are part
of Intel's '810' and other chipsets. of Intel's '810' and other chipsets.
...@@ -121,7 +122,8 @@ static int i801_setup(struct pci_dev *dev) ...@@ -121,7 +122,8 @@ static int i801_setup(struct pci_dev *dev)
I801_dev = dev; I801_dev = dev;
if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) || if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) ||
(dev->device == PCI_DEVICE_ID_INTEL_82801EB_3)) (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) ||
(dev->device == PCI_DEVICE_ID_INTEL_ESB_4))
isich4 = 1; isich4 = 1;
else else
isich4 = 0; isich4 = 0;
...@@ -576,10 +578,22 @@ static struct pci_device_id i801_ids[] = { ...@@ -576,10 +578,22 @@ static struct pci_device_id i801_ids[] = {
.subdevice = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
}, },
{ {
.vendor = PCI_VENDOR_ID_INTEL, .vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_3, .device = PCI_DEVICE_ID_INTEL_82801EB_3,
.subvendor = PCI_ANY_ID, .subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
},
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_ESB_4,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_ICH6_16,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
}, },
{ 0, } { 0, }
}; };
......
...@@ -153,7 +153,7 @@ static int piix_get_info (char *buffer, char **addr, off_t offset, int count) ...@@ -153,7 +153,7 @@ static int piix_get_info (char *buffer, char **addr, off_t offset, int count)
case PCI_DEVICE_ID_INTEL_82801EB_11: case PCI_DEVICE_ID_INTEL_82801EB_11:
case PCI_DEVICE_ID_INTEL_82801E_11: case PCI_DEVICE_ID_INTEL_82801E_11:
case PCI_DEVICE_ID_INTEL_ESB_2: case PCI_DEVICE_ID_INTEL_ESB_2:
case PCI_DEVICE_ID_INTEL_ICH6_2: case PCI_DEVICE_ID_INTEL_ICH6_19:
p += sprintf(p, "PIIX4 Ultra 100 "); p += sprintf(p, "PIIX4 Ultra 100 ");
break; break;
case PCI_DEVICE_ID_INTEL_82372FB_1: case PCI_DEVICE_ID_INTEL_82372FB_1:
...@@ -292,7 +292,7 @@ static u8 piix_ratemask (ide_drive_t *drive) ...@@ -292,7 +292,7 @@ static u8 piix_ratemask (ide_drive_t *drive)
case PCI_DEVICE_ID_INTEL_82801DB_11: case PCI_DEVICE_ID_INTEL_82801DB_11:
case PCI_DEVICE_ID_INTEL_82801EB_11: case PCI_DEVICE_ID_INTEL_82801EB_11:
case PCI_DEVICE_ID_INTEL_ESB_2: case PCI_DEVICE_ID_INTEL_ESB_2:
case PCI_DEVICE_ID_INTEL_ICH6_2: case PCI_DEVICE_ID_INTEL_ICH6_19:
mode = 3; mode = 3;
break; break;
/* UDMA 66 capable */ /* UDMA 66 capable */
...@@ -627,7 +627,7 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char ...@@ -627,7 +627,7 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char
case PCI_DEVICE_ID_INTEL_82801EB_11: case PCI_DEVICE_ID_INTEL_82801EB_11:
case PCI_DEVICE_ID_INTEL_82801E_11: case PCI_DEVICE_ID_INTEL_82801E_11:
case PCI_DEVICE_ID_INTEL_ESB_2: case PCI_DEVICE_ID_INTEL_ESB_2:
case PCI_DEVICE_ID_INTEL_ICH6_2: case PCI_DEVICE_ID_INTEL_ICH6_19:
{ {
unsigned int extra = 0; unsigned int extra = 0;
pci_read_config_dword(dev, 0x54, &extra); pci_read_config_dword(dev, 0x54, &extra);
...@@ -804,7 +804,7 @@ static struct pci_device_id piix_pci_tbl[] = { ...@@ -804,7 +804,7 @@ static struct pci_device_id piix_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18},
#endif /* !CONFIG_SCSI_SATA */ #endif /* !CONFIG_SCSI_SATA */
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20},
{ 0, }, { 0, },
}; };
MODULE_DEVICE_TABLE(pci, piix_pci_tbl); MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
......
...@@ -70,7 +70,7 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { ...@@ -70,7 +70,7 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
/* 17 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_82801DB_10, "ICH4"), /* 17 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_82801DB_10, "ICH4"),
/* 18 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_82801EB_1, "ICH5-SATA"), /* 18 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_82801EB_1, "ICH5-SATA"),
/* 19 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_ESB_2, "ICH5"), /* 19 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_ESB_2, "ICH5"),
/* 20 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_ICH6_2, "ICH6"), /* 20 */ DECLARE_PIIX_DEV(PCI_DEVICE_ID_INTEL_ICH6_19, "ICH6"),
{ {
.vendor = 0, .vendor = 0,
.device = 0, .device = 0,
......
...@@ -2058,7 +2058,6 @@ ...@@ -2058,7 +2058,6 @@
#define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7 #define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7
#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db #define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db
#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd #define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd
#define PCI_DEVICE_ID_INTEL_ESB_0 0x25a0
#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 #define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1
#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 #define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2
#define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3 #define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3
...@@ -2084,8 +2083,24 @@ ...@@ -2084,8 +2083,24 @@
#define PCI_DEVICE_ID_INTEL_82875_IG 0x257b #define PCI_DEVICE_ID_INTEL_82875_IG 0x257b
#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 #define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640
#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 #define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641
#define PCI_DEVICE_ID_INTEL_ICH6_2 0x266f #define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642
#define PCI_DEVICE_ID_INTEL_ICH6_3 0x266e #define PCI_DEVICE_ID_INTEL_ICH6_3 0x2651
#define PCI_DEVICE_ID_INTEL_ICH6_4 0x2652
#define PCI_DEVICE_ID_INTEL_ICH6_5 0x2653
#define PCI_DEVICE_ID_INTEL_ICH6_6 0x2658
#define PCI_DEVICE_ID_INTEL_ICH6_7 0x2659
#define PCI_DEVICE_ID_INTEL_ICH6_8 0x265a
#define PCI_DEVICE_ID_INTEL_ICH6_9 0x265b
#define PCI_DEVICE_ID_INTEL_ICH6_10 0x265c
#define PCI_DEVICE_ID_INTEL_ICH6_11 0x2660
#define PCI_DEVICE_ID_INTEL_ICH6_12 0x2662
#define PCI_DEVICE_ID_INTEL_ICH6_13 0x2664
#define PCI_DEVICE_ID_INTEL_ICH6_14 0x2666
#define PCI_DEVICE_ID_INTEL_ICH6_15 0x2668
#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a
#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d
#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 #define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
......
...@@ -120,8 +120,8 @@ ...@@ -120,8 +120,8 @@
#ifndef PCI_DEVICE_ID_INTEL_ICH5 #ifndef PCI_DEVICE_ID_INTEL_ICH5
#define PCI_DEVICE_ID_INTEL_ICH5 0x24d5 #define PCI_DEVICE_ID_INTEL_ICH5 0x24d5
#endif #endif
#ifndef PCI_DEVICE_ID_INTEL_ICH6_3 #ifndef PCI_DEVICE_ID_INTEL_ICH6_18
#define PCI_DEVICE_ID_INTEL_ICH6_3 0x266e #define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
#endif #endif
#ifndef PCI_DEVICE_ID_INTEL_440MX #ifndef PCI_DEVICE_ID_INTEL_440MX
#define PCI_DEVICE_ID_INTEL_440MX 0x7195 #define PCI_DEVICE_ID_INTEL_440MX 0x7195
...@@ -351,7 +351,7 @@ static struct pci_device_id i810_pci_tbl [] = { ...@@ -351,7 +351,7 @@ static struct pci_device_id i810_pci_tbl [] = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_5, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_5,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_3, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_18,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
{0,} {0,}
...@@ -2797,7 +2797,7 @@ static int i810_ac97_power_up_bus(struct i810_card *card) ...@@ -2797,7 +2797,7 @@ static int i810_ac97_power_up_bus(struct i810_card *card)
/* see i810_ac97_init for the next 7 lines (jsaw) */ /* see i810_ac97_init for the next 7 lines (jsaw) */
inw(card->ac97base); inw(card->ac97base);
if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5 || if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5 ||
card->pci_id == PCI_DEVICE_ID_INTEL_ESB_5 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH6_3) card->pci_id == PCI_DEVICE_ID_INTEL_ESB_5 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH6_18)
&& (card->use_mmio)) { && (card->use_mmio)) {
primary_codec_id = (int) readl(card->iobase_mmio + SDM) & 0x3; primary_codec_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
printk(KERN_INFO "i810_audio: Primary codec has ID %d\n", printk(KERN_INFO "i810_audio: Primary codec has ID %d\n",
...@@ -2868,7 +2868,7 @@ static int __devinit i810_ac97_init(struct i810_card *card) ...@@ -2868,7 +2868,7 @@ static int __devinit i810_ac97_init(struct i810_card *card)
last codec ID spoken to. last codec ID spoken to.
*/ */
if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5 || if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5 ||
card->pci_id == PCI_DEVICE_ID_INTEL_ESB_5 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH6_3) card->pci_id == PCI_DEVICE_ID_INTEL_ESB_5 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH6_18)
&& (card->use_mmio)) { && (card->use_mmio)) {
ac97_id = (int) readl(card->iobase_mmio + SDM) & 0x3; ac97_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
printk(KERN_INFO "i810_audio: Connection %d with codec id %d\n", printk(KERN_INFO "i810_audio: Connection %d with codec id %d\n",
......
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