Commit 60571f98 authored by Kukjin Kim's avatar Kukjin Kim

Merge branch 'topic/cleanup-use-static' into next/cleanup-use-static

Conflicts:
	arch/arm/mach-exynos/dma.c
	arch/arm/mach-s5p64x0/dma.c
	arch/arm/mach-s5pc100/dma.c
	arch/arm/mach-s5pv210/dma.c
parents a5f17d1f 6d259a25
......@@ -115,7 +115,7 @@ static void exynos4210_clock_resume(void)
#define exynos4210_clock_resume NULL
#endif
struct syscore_ops exynos4210_clock_syscore_ops = {
static struct syscore_ops exynos4210_clock_syscore_ops = {
.suspend = exynos4210_clock_suspend,
.resume = exynos4210_clock_resume,
};
......
......@@ -87,7 +87,7 @@ static void exynos4212_clock_resume(void)
#define exynos4212_clock_resume NULL
#endif
struct syscore_ops exynos4212_clock_syscore_ops = {
static struct syscore_ops exynos4212_clock_syscore_ops = {
.suspend = exynos4212_clock_suspend,
.resume = exynos4212_clock_resume,
};
......
......@@ -1524,7 +1524,7 @@ static void exynos4_clock_resume(void)
#define exynos4_clock_resume NULL
#endif
struct syscore_ops exynos4_clock_syscore_ops = {
static struct syscore_ops exynos4_clock_syscore_ops = {
.suspend = exynos4_clock_suspend,
.resume = exynos4_clock_resume,
};
......
......@@ -661,7 +661,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
int __init exynos4_init_irq_eint(void)
static int __init exynos4_init_irq_eint(void)
{
int irq;
......
......@@ -36,7 +36,7 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
u8 pdma0_peri[] = {
static u8 pdma0_peri[] = {
DMACH_PCM0_RX,
DMACH_PCM0_TX,
DMACH_PCM2_RX,
......@@ -69,15 +69,15 @@ u8 pdma0_peri[] = {
DMACH_AC97_PCMOUT,
};
struct dma_pl330_platdata exynos4_pdma0_pdata = {
static struct dma_pl330_platdata exynos4_pdma0_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
.peri_id = pdma0_peri,
};
AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
{IRQ_PDMA0}, &exynos4_pdma0_pdata);
static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330,
EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata);
u8 pdma1_peri[] = {
static u8 pdma1_peri[] = {
DMACH_PCM0_RX,
DMACH_PCM0_TX,
DMACH_PCM1_RX,
......@@ -105,13 +105,13 @@ u8 pdma1_peri[] = {
DMACH_SLIMBUS5_TX,
};
struct dma_pl330_platdata exynos4_pdma1_pdata = {
static struct dma_pl330_platdata exynos4_pdma1_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
.peri_id = pdma1_peri,
};
AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
{IRQ_PDMA1}, &exynos4_pdma1_pdata);
static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330,
EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata);
static int __init exynos4_dma_init(void)
{
......
......@@ -412,7 +412,7 @@ static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
{ MAX8997_BUCK7, &max8997_buck7_data },
};
struct max8997_platform_data __initdata origen_max8997_pdata = {
static struct max8997_platform_data __initdata origen_max8997_pdata = {
.num_regulators = ARRAY_SIZE(origen_max8997_regulators),
.regulators = origen_max8997_regulators,
......
......@@ -997,7 +997,7 @@ static void __init universal_map_io(void)
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
}
void s5p_tv_setup(void)
static void s5p_tv_setup(void)
{
/* direct HPD to HDMI chip */
gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
......
......@@ -162,7 +162,7 @@ static int h1940_gpiolib_latch_get(struct gpio_chip *chip,
return (latch_state >> (offset + 16)) & 1;
}
struct gpio_chip h1940_latch_gpiochip = {
static struct gpio_chip h1940_latch_gpiochip = {
.base = H1940_LATCH_GPIO(0),
.owner = THIS_MODULE,
.label = "H1940_LATCH",
......@@ -304,7 +304,7 @@ static const struct s3c_adc_bat_thresh bat_lut_acin[] = {
{ .volt = 3841, .cur = 0, .level = 0},
};
int h1940_bat_init(void)
static int h1940_bat_init(void)
{
int ret;
......@@ -317,17 +317,17 @@ int h1940_bat_init(void)
}
void h1940_bat_exit(void)
static void h1940_bat_exit(void)
{
gpio_free(H1940_LATCH_SM803_ENABLE);
}
void h1940_enable_charger(void)
static void h1940_enable_charger(void)
{
gpio_set_value(H1940_LATCH_SM803_ENABLE, 1);
}
void h1940_disable_charger(void)
static void h1940_disable_charger(void)
{
gpio_set_value(H1940_LATCH_SM803_ENABLE, 0);
}
......@@ -364,7 +364,7 @@ static struct platform_device h1940_battery = {
},
};
DEFINE_SPINLOCK(h1940_blink_spin);
static DEFINE_SPINLOCK(h1940_blink_spin);
int h1940_led_blink_set(unsigned gpio, int state,
unsigned long *delay_on, unsigned long *delay_off)
......
......@@ -132,12 +132,6 @@ static struct clk hsmmc0_clk = {
.ctrlbit = S3C2416_HCLKCON_HSMMC0,
};
void __init_or_cpufreq s3c2416_setup_clocks(void)
{
s3c2443_common_setup_clocks(s3c2416_get_pll);
}
static struct clksrc_clk *clksrcs[] __initdata = {
&hsspi_eplldiv,
&hsspi_mux,
......
......@@ -125,7 +125,7 @@ static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = {
}
};
void smdk2416_hsudc_gpio_init(void)
static void smdk2416_hsudc_gpio_init(void)
{
s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_NONE);
......@@ -133,20 +133,20 @@ void smdk2416_hsudc_gpio_init(void)
s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 0);
}
void smdk2416_hsudc_gpio_uninit(void)
static void smdk2416_hsudc_gpio_uninit(void)
{
s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 1);
s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_NONE);
s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(0));
}
struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = {
static struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = {
.epnum = 9,
.gpio_init = smdk2416_hsudc_gpio_init,
.gpio_uninit = smdk2416_hsudc_gpio_uninit,
};
struct s3c_fb_pd_win smdk2416_fb_win[] = {
static struct s3c_fb_pd_win smdk2416_fb_win[] = {
[0] = {
/* think this is the same as the smdk6410 */
.win_mode = {
......
......@@ -258,7 +258,7 @@ static struct pcf50633_bl_platform_data gta02_backlight_data = {
.ramp_time = 5,
};
struct pcf50633_platform_data gta02_pcf_pdata = {
static struct pcf50633_platform_data gta02_pcf_pdata = {
.resumers = {
[0] = PCF50633_INT1_USBINS |
PCF50633_INT1_USBREM |
......@@ -404,7 +404,7 @@ static struct platform_device gta02_nor_flash = {
};
struct platform_device s3c24xx_pwm_device = {
static struct platform_device s3c24xx_pwm_device = {
.name = "s3c24xx_pwm",
.num_resources = 0,
};
......
......@@ -217,7 +217,7 @@ static const struct s3c_adc_bat_thresh bat_lut_acin[] = {
{ .volt = 3820, .cur = 0, .level = 0},
};
int rx1950_bat_init(void)
static int rx1950_bat_init(void)
{
int ret;
......@@ -236,25 +236,25 @@ int rx1950_bat_init(void)
return ret;
}
void rx1950_bat_exit(void)
static void rx1950_bat_exit(void)
{
gpio_free(S3C2410_GPJ(2));
gpio_free(S3C2410_GPJ(3));
}
void rx1950_enable_charger(void)
static void rx1950_enable_charger(void)
{
gpio_direction_output(S3C2410_GPJ(2), 1);
gpio_direction_output(S3C2410_GPJ(3), 1);
}
void rx1950_disable_charger(void)
static void rx1950_disable_charger(void)
{
gpio_direction_output(S3C2410_GPJ(2), 0);
gpio_direction_output(S3C2410_GPJ(3), 0);
}
DEFINE_SPINLOCK(rx1950_blink_spin);
static DEFINE_SPINLOCK(rx1950_blink_spin);
static int rx1950_led_blink_set(unsigned gpio, int state,
unsigned long *delay_on, unsigned long *delay_off)
......@@ -382,7 +382,7 @@ static struct s3c2410fb_mach_info rx1950_lcd_cfg = {
static struct pwm_device *lcd_pwm;
void rx1950_lcd_power(int enable)
static void rx1950_lcd_power(int enable)
{
int i;
static int enabled;
......
......@@ -49,7 +49,7 @@
/* uart registration process */
void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
}
......
......@@ -25,8 +25,6 @@ void s3c64xx_setup_clocks(void);
void s3c64xx_restart(char mode, const char *cmd);
extern struct syscore_ops s3c64xx_irq_syscore_ops;
#ifdef CONFIG_CPU_S3C6400
extern int s3c6400_init(void);
......
......@@ -96,7 +96,7 @@ static void s3c64xx_irq_pm_resume(void)
S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
}
struct syscore_ops s3c64xx_irq_syscore_ops = {
static struct syscore_ops s3c64xx_irq_syscore_ops = {
.suspend = s3c64xx_irq_pm_suspend,
.resume = s3c64xx_irq_pm_resume,
};
......
......@@ -73,7 +73,7 @@ static const u32 clock_table[][3] = {
{L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
};
unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
static unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
{
unsigned long rate = clk_get_rate(clk->parent);
u32 clkdiv;
......@@ -84,7 +84,8 @@ unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
return rate / (clkdiv + 1);
}
unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate)
static unsigned long s5p64x0_armclk_round_rate(struct clk *clk,
unsigned long rate)
{
u32 iter;
......@@ -96,7 +97,7 @@ unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate)
return clock_table[ARRAY_SIZE(clock_table) - 1][0];
}
int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
{
u32 round_tmp;
u32 iter;
......@@ -148,7 +149,7 @@ int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
return 0;
}
struct clk_ops s5p64x0_clkarm_ops = {
static struct clk_ops s5p64x0_clkarm_ops = {
.get_rate = s5p64x0_armclk_get_rate,
.set_rate = s5p64x0_armclk_set_rate,
.round_rate = s5p64x0_armclk_round_rate,
......@@ -173,7 +174,7 @@ struct clksrc_clk clk_dout_mpll = {
.reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 },
};
struct clk *clkset_hclk_low_list[] = {
static struct clk *clkset_hclk_low_list[] = {
&clk_mout_apll.clk,
&clk_mout_mpll.clk,
};
......
......@@ -38,7 +38,7 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
u8 s5p6440_pdma_peri[] = {
static u8 s5p6440_pdma_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
DMACH_UART1_RX,
......@@ -63,12 +63,12 @@ u8 s5p6440_pdma_peri[] = {
DMACH_SPI1_RX,
};
struct dma_pl330_platdata s5p6440_pdma_pdata = {
static struct dma_pl330_platdata s5p6440_pdma_pdata = {
.nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
.peri_id = s5p6440_pdma_peri,
};
u8 s5p6450_pdma_peri[] = {
static u8 s5p6450_pdma_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
DMACH_UART1_RX,
......@@ -103,13 +103,13 @@ u8 s5p6450_pdma_peri[] = {
DMACH_UART5_TX,
};
struct dma_pl330_platdata s5p6450_pdma_pdata = {
static struct dma_pl330_platdata s5p6450_pdma_pdata = {
.nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
.peri_id = s5p6450_pdma_peri,
};
AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA,
{IRQ_DMA0}, NULL);
static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330,
S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL);
static int __init s5p64x0_dma_init(void)
{
......
......@@ -22,16 +22,9 @@ extern struct clksrc_clk clk_mout_epll;
extern int s5p64x0_epll_enable(struct clk *clk, int enable);
extern unsigned long s5p64x0_epll_get_rate(struct clk *clk);
extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk);
extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate);
extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate);
extern struct clk_ops s5p64x0_clkarm_ops;
extern struct clksrc_clk clk_armclk;
extern struct clksrc_clk clk_dout_mpll;
extern struct clk *clkset_hclk_low_list[];
extern struct clksrc_sources clkset_hclk_low;
extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable);
......
......@@ -170,7 +170,7 @@ static struct clk *clk_src_mout_am_list[] = {
[1] = &clk_div_apll2.clk,
};
struct clksrc_sources clk_src_mout_am = {
static struct clksrc_sources clk_src_mout_am = {
.sources = clk_src_mout_am_list,
.nr_sources = ARRAY_SIZE(clk_src_mout_am_list),
};
......@@ -212,7 +212,7 @@ static struct clk *clk_src_mout_onenand_list[] = {
[1] = &clk_div_d1_bus.clk,
};
struct clksrc_sources clk_src_mout_onenand = {
static struct clksrc_sources clk_src_mout_onenand = {
.sources = clk_src_mout_onenand_list,
.nr_sources = ARRAY_SIZE(clk_src_mout_onenand_list),
};
......@@ -756,7 +756,7 @@ static struct clk *clk_src_group1_list[] = {
[3] = &clk_mout_hpll.clk,
};
struct clksrc_sources clk_src_group1 = {
static struct clksrc_sources clk_src_group1 = {
.sources = clk_src_group1_list,
.nr_sources = ARRAY_SIZE(clk_src_group1_list),
};
......@@ -766,7 +766,7 @@ static struct clk *clk_src_group2_list[] = {
[1] = &clk_div_mpll.clk,
};
struct clksrc_sources clk_src_group2 = {
static struct clksrc_sources clk_src_group2 = {
.sources = clk_src_group2_list,
.nr_sources = ARRAY_SIZE(clk_src_group2_list),
};
......@@ -780,7 +780,7 @@ static struct clk *clk_src_group3_list[] = {
[5] = &clk_mout_hpll.clk,
};
struct clksrc_sources clk_src_group3 = {
static struct clksrc_sources clk_src_group3 = {
.sources = clk_src_group3_list,
.nr_sources = ARRAY_SIZE(clk_src_group3_list),
};
......@@ -806,7 +806,7 @@ static struct clk *clk_src_group4_list[] = {
[5] = &clk_mout_hpll.clk,
};
struct clksrc_sources clk_src_group4 = {
static struct clksrc_sources clk_src_group4 = {
.sources = clk_src_group4_list,
.nr_sources = ARRAY_SIZE(clk_src_group4_list),
};
......@@ -831,7 +831,7 @@ static struct clk *clk_src_group5_list[] = {
[4] = &clk_mout_hpll.clk,
};
struct clksrc_sources clk_src_group5 = {
static struct clksrc_sources clk_src_group5 = {
.sources = clk_src_group5_list,
.nr_sources = ARRAY_SIZE(clk_src_group5_list),
};
......@@ -854,7 +854,7 @@ static struct clk *clk_src_group6_list[] = {
[2] = &clk_div_hdmi.clk,
};
struct clksrc_sources clk_src_group6 = {
static struct clksrc_sources clk_src_group6 = {
.sources = clk_src_group6_list,
.nr_sources = ARRAY_SIZE(clk_src_group6_list),
};
......@@ -866,7 +866,7 @@ static struct clk *clk_src_group7_list[] = {
[3] = &clk_vclk54m,
};
struct clksrc_sources clk_src_group7 = {
static struct clksrc_sources clk_src_group7 = {
.sources = clk_src_group7_list,
.nr_sources = ARRAY_SIZE(clk_src_group7_list),
};
......@@ -877,7 +877,7 @@ static struct clk *clk_src_mmc0_list[] = {
[2] = &clk_fin_epll,
};
struct clksrc_sources clk_src_mmc0 = {
static struct clksrc_sources clk_src_mmc0 = {
.sources = clk_src_mmc0_list,
.nr_sources = ARRAY_SIZE(clk_src_mmc0_list),
};
......@@ -889,7 +889,7 @@ static struct clk *clk_src_mmc12_list[] = {
[3] = &clk_mout_hpll.clk,
};
struct clksrc_sources clk_src_mmc12 = {
static struct clksrc_sources clk_src_mmc12 = {
.sources = clk_src_mmc12_list,
.nr_sources = ARRAY_SIZE(clk_src_mmc12_list),
};
......@@ -901,7 +901,7 @@ static struct clk *clk_src_irda_usb_list[] = {
[3] = &clk_mout_hpll.clk,
};
struct clksrc_sources clk_src_irda_usb = {
static struct clksrc_sources clk_src_irda_usb = {
.sources = clk_src_irda_usb_list,
.nr_sources = ARRAY_SIZE(clk_src_irda_usb_list),
};
......@@ -912,7 +912,7 @@ static struct clk *clk_src_pwi_list[] = {
[2] = &clk_div_mpll.clk,
};
struct clksrc_sources clk_src_pwi = {
static struct clksrc_sources clk_src_pwi = {
.sources = clk_src_pwi_list,
.nr_sources = ARRAY_SIZE(clk_src_pwi_list),
};
......@@ -923,7 +923,7 @@ static struct clk *clk_sclk_spdif_list[] = {
[2] = &clk_sclk_audio2.clk,
};
struct clksrc_sources clk_src_sclk_spdif = {
static struct clksrc_sources clk_src_sclk_spdif = {
.sources = clk_sclk_spdif_list,
.nr_sources = ARRAY_SIZE(clk_sclk_spdif_list),
};
......
......@@ -35,7 +35,7 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
u8 pdma0_peri[] = {
static u8 pdma0_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
DMACH_UART1_RX,
......@@ -68,15 +68,15 @@ u8 pdma0_peri[] = {
DMACH_HSI_TX,
};
struct dma_pl330_platdata s5pc100_pdma0_pdata = {
static struct dma_pl330_platdata s5pc100_pdma0_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
.peri_id = pdma0_peri,
};
AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0,
{IRQ_PDMA0}, &s5pc100_pdma0_pdata);
static AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330,
S5PC100_PA_PDMA0, {IRQ_PDMA0}, &s5pc100_pdma0_pdata);
u8 pdma1_peri[] = {
static u8 pdma1_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
DMACH_UART1_RX,
......@@ -109,13 +109,13 @@ u8 pdma1_peri[] = {
DMACH_MSM_REQ3,
};
struct dma_pl330_platdata s5pc100_pdma1_pdata = {
static struct dma_pl330_platdata s5pc100_pdma1_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
.peri_id = pdma1_peri,
};
AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1,
{IRQ_PDMA1}, &s5pc100_pdma1_pdata);
static AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330,
S5PC100_PA_PDMA1, {IRQ_PDMA1}, &s5pc100_pdma1_pdata);
static int __init s5pc100_dma_init(void)
{
......
......@@ -35,7 +35,7 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
u8 pdma0_peri[] = {
static u8 pdma0_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
DMACH_UART1_RX,
......@@ -66,15 +66,15 @@ u8 pdma0_peri[] = {
DMACH_SPDIF,
};
struct dma_pl330_platdata s5pv210_pdma0_pdata = {
static struct dma_pl330_platdata s5pv210_pdma0_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
.peri_id = pdma0_peri,
};
AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0,
{IRQ_PDMA0}, &s5pv210_pdma0_pdata);
static AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330,
S5PV210_PA_PDMA0, {IRQ_PDMA0}, &s5pv210_pdma0_pdata);
u8 pdma1_peri[] = {
static u8 pdma1_peri[] = {
DMACH_UART0_RX,
DMACH_UART0_TX,
DMACH_UART1_RX,
......@@ -109,13 +109,13 @@ u8 pdma1_peri[] = {
DMACH_PCM2_TX,
};
struct dma_pl330_platdata s5pv210_pdma1_pdata = {
static struct dma_pl330_platdata s5pv210_pdma1_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
.peri_id = pdma1_peri,
};
AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1,
{IRQ_PDMA1}, &s5pv210_pdma1_pdata);
static AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330,
S5PV210_PA_PDMA1, {IRQ_PDMA1}, &s5pv210_pdma1_pdata);
static int __init s5pv210_dma_init(void)
{
......
......@@ -844,7 +844,7 @@ static struct s5p_fimc_isp_info goni_camera_sensors[] = {
},
};
struct s5p_platform_fimc goni_fimc_md_platdata __initdata = {
static struct s5p_platform_fimc goni_fimc_md_platdata __initdata = {
.isp_info = goni_camera_sensors,
.num_clients = ARRAY_SIZE(goni_camera_sensors),
};
......
......@@ -140,7 +140,7 @@ static struct dm9000_plat_data smdkv210_dm9000_platdata = {
.dev_addr = { 0x00, 0x09, 0xc0, 0xff, 0xec, 0x48 },
};
struct platform_device smdkv210_dm9000 = {
static struct platform_device smdkv210_dm9000 = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(smdkv210_dm9000_resources),
......
......@@ -53,7 +53,7 @@ int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
* elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
* such directly equating the two source clocks is impossible.
*/
struct clk clk_mpllref = {
static struct clk clk_mpllref = {
.name = "mpllref",
.parent = &clk_xtal,
};
......
......@@ -200,7 +200,7 @@ static struct irq_chip s5p_irq_vic_eint = {
#endif
};
int __init s5p_init_irq_eint(void)
static int __init s5p_init_irq_eint(void)
{
int irq;
......
......@@ -41,7 +41,7 @@ struct s5p_gpioint_bank {
void (*handler)(unsigned int, struct irq_desc *);
};
LIST_HEAD(banks);
static LIST_HEAD(banks);
static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type)
{
......
......@@ -742,17 +742,6 @@ struct platform_device s3c_device_iis = {
};
#endif /* CONFIG_PLAT_S3C24XX */
#ifdef CONFIG_CPU_S3C2440
struct platform_device s3c2412_device_iis = {
.name = "s3c2412-iis",
.id = -1,
.dev = {
.dma_mask = &samsung_device_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
}
};
#endif /* CONFIG_CPU_S3C2440 */
/* IDE CFCON */
#ifdef CONFIG_SAMSUNG_DEV_IDE
......@@ -1076,7 +1065,7 @@ static struct resource s5p_pmu_resource[] = {
DEFINE_RES_IRQ(IRQ_PMU)
};
struct platform_device s5p_device_pmu = {
static struct platform_device s5p_device_pmu = {
.name = "arm-pmu",
.id = ARM_PMU_DEVICE_CPU,
.num_resources = ARRAY_SIZE(s5p_pmu_resource),
......
......@@ -116,7 +116,7 @@ static inline int samsung_dmadev_flush(unsigned ch)
return dmaengine_terminate_all((struct dma_chan *)ch);
}
struct samsung_dma_ops dmadev_ops = {
static struct samsung_dma_ops dmadev_ops = {
.request = samsung_dmadev_request,
.release = samsung_dmadev_release,
.prepare = samsung_dmadev_prepare,
......
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