Commit 61dc5334 authored by Jon Mason's avatar Jon Mason Committed by David S. Miller

ixgb: use PCI_VENDOR_ID_INTEL

Use PCI_VENDOR_ID_INTEL from pci_ids.h instead of creating its own
vendor ID #define.
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Bruce Allan <bruce.w.allan@intel.com>
Cc: Carolyn Wyborny <carolyn.wyborny@intel.com>
Cc: Don Skidmore <donald.c.skidmore@intel.com>
Cc: Greg Rose <gregory.v.rose@intel.com>
Cc: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Cc: Alex Duyck <alexander.h.duyck@intel.com>
Cc: John Ronciak <john.ronciak@intel.com>
Acked-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5e80bc78
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/pci_ids.h>
#include "ixgb_hw.h" #include "ixgb_hw.h"
#include "ixgb_ids.h" #include "ixgb_ids.h"
...@@ -96,7 +97,7 @@ static u32 ixgb_mac_reset(struct ixgb_hw *hw) ...@@ -96,7 +97,7 @@ static u32 ixgb_mac_reset(struct ixgb_hw *hw)
ASSERT(!(ctrl_reg & IXGB_CTRL0_RST)); ASSERT(!(ctrl_reg & IXGB_CTRL0_RST));
#endif #endif
if (hw->subsystem_vendor_id == SUN_SUBVENDOR_ID) { if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN) {
ctrl_reg = /* Enable interrupt from XFP and SerDes */ ctrl_reg = /* Enable interrupt from XFP and SerDes */
IXGB_CTRL1_GPI0_EN | IXGB_CTRL1_GPI0_EN |
IXGB_CTRL1_SDP6_DIR | IXGB_CTRL1_SDP6_DIR |
...@@ -271,7 +272,7 @@ ixgb_identify_phy(struct ixgb_hw *hw) ...@@ -271,7 +272,7 @@ ixgb_identify_phy(struct ixgb_hw *hw)
} }
/* update phy type for sun specific board */ /* update phy type for sun specific board */
if (hw->subsystem_vendor_id == SUN_SUBVENDOR_ID) if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN)
phy_type = ixgb_phy_type_bcm; phy_type = ixgb_phy_type_bcm;
return phy_type; return phy_type;
......
...@@ -33,11 +33,6 @@ ...@@ -33,11 +33,6 @@
** The Device and Vendor IDs for 10 Gigabit MACs ** The Device and Vendor IDs for 10 Gigabit MACs
**********************************************************************/ **********************************************************************/
#define INTEL_VENDOR_ID 0x8086
#define INTEL_SUBVENDOR_ID 0x8086
#define SUN_VENDOR_ID 0x108E
#define SUN_SUBVENDOR_ID 0x108E
#define IXGB_DEVICE_ID_82597EX 0x1048 #define IXGB_DEVICE_ID_82597EX 0x1048
#define IXGB_DEVICE_ID_82597EX_SR 0x1A48 #define IXGB_DEVICE_ID_82597EX_SR 0x1A48
#define IXGB_DEVICE_ID_82597EX_LR 0x1B48 #define IXGB_DEVICE_ID_82597EX_LR 0x1B48
......
...@@ -54,13 +54,13 @@ MODULE_PARM_DESC(copybreak, ...@@ -54,13 +54,13 @@ MODULE_PARM_DESC(copybreak,
* Class, Class Mask, private data (not used) } * Class, Class Mask, private data (not used) }
*/ */
static DEFINE_PCI_DEVICE_TABLE(ixgb_pci_tbl) = { static DEFINE_PCI_DEVICE_TABLE(ixgb_pci_tbl) = {
{INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX, {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4, {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_CX4,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR, {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_SR,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR, {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_LR,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
/* required last entry */ /* required last entry */
...@@ -195,7 +195,7 @@ ixgb_irq_enable(struct ixgb_adapter *adapter) ...@@ -195,7 +195,7 @@ ixgb_irq_enable(struct ixgb_adapter *adapter)
{ {
u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
IXGB_INT_TXDW | IXGB_INT_LSC; IXGB_INT_TXDW | IXGB_INT_LSC;
if (adapter->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID) if (adapter->hw.subsystem_vendor_id == PCI_VENDOR_ID_SUN)
val |= IXGB_INT_GPI0; val |= IXGB_INT_GPI0;
IXGB_WRITE_REG(&adapter->hw, IMS, val); IXGB_WRITE_REG(&adapter->hw, IMS, val);
IXGB_WRITE_FLUSH(&adapter->hw); IXGB_WRITE_FLUSH(&adapter->hw);
......
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