Commit 624dbf55 authored by govindarajulu.v's avatar govindarajulu.v Committed by David S. Miller

driver/net: enic: Try DMA 64 first, then failover to DMA

In servers with more than 1.1 TB of RAM, the existing 40/32 bit DMA
could cause failure as the DMA-able address could go outside the range
addressable using 40/32 bits.

The following patch first tried 64 bit DMA if possible, failover to 32
bit.
Signed-off-by: default avatarSujith Sankar <ssujith@cisco.com>
Signed-off-by: default avatarChristian Benvenuti <benve@cisco.com>
Signed-off-by: default avatarGovindarajulu Varadarajan <govindarajulu90@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent bf751ba8
......@@ -2080,11 +2080,11 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
pci_set_master(pdev);
/* Query PCI controller on system for DMA addressing
* limitation for the device. Try 40-bit first, and
* limitation for the device. Try 64-bit first, and
* fail to 32-bit.
*/
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
if (err) {
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
if (err) {
......@@ -2098,10 +2098,10 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
goto err_out_release_regions;
}
} else {
err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
if (err) {
dev_err(dev, "Unable to obtain %u-bit DMA "
"for consistent allocations, aborting\n", 40);
"for consistent allocations, aborting\n", 64);
goto err_out_release_regions;
}
using_dac = 1;
......
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