Commit 626a16c1 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Au1200: MMC resource size off by one
  [MIPS] TANBAC: Update defconfig
  [MIPS] Vr41xx: Initialize PCI io_map_base
  [MIPS] Malta: Always compile MTD platform device registration code.
  [MIPS] Malta: Fix build errors for 64-bit kernels
  [MIPS] Lasat: sysctl fixup
  [MIPS] Fix buggy use of kmap_coherent.
  [MIPS] Lasat: bring back from the dead
  [MIPS] vpe_id is required for VSMP and SMTC builds
  [MIPS] Export smp_call_function and smp_call_function_single.
  [MIPS] Bring the SWARM defconfig up to date
  [MIPS] Sibyte: Build RTC support as an object
  [MIPS] Fix the fix for divide by zero error in build_{clear,copy}_page
  [MIPS] Fix build for PNX platforms.
  [MIPS] Add RM200 with R5000 CPU to known ARC machines
  [MIPS] Better load address for big endian SNI RM
  [MIPS] SB1250: Initialize io_map_base
  [MIPS] Alchemy: Add au1500 reserved interrupt
  [MIPS] Export empty_zero_page for sake of the ext4 module.
parents e53d6a15 dab8c6de
......@@ -538,19 +538,19 @@ cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
# Sibyte SWARM board
# Sibyte BCM91x80 (BigSur) board
#
libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
core-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
#
......@@ -565,7 +565,11 @@ load-$(CONFIG_BCM47XX) := 0xffffffff80001000
#
core-$(CONFIG_SNI_RM) += arch/mips/sni/
cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm
ifdef CONFIG_CPU_LITTLE_ENDIAN
load-$(CONFIG_SNI_RM) += 0xffffffff80600000
else
load-$(CONFIG_SNI_RM) += 0xffffffff80030000
endif
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
#
......
......@@ -165,12 +165,12 @@ static struct resource au1xxx_usb_gdt_resources[] = {
static struct resource au1xxx_mmc_resources[] = {
[0] = {
.start = SD0_PHYS_ADDR,
.end = SD0_PHYS_ADDR + 0x40,
.end = SD0_PHYS_ADDR + 0x7ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SD1_PHYS_ADDR,
.end = SD1_PHYS_ADDR + 0x40,
.end = SD1_PHYS_ADDR + 0x7ffff,
.flags = IORESOURCE_MEM,
},
[2] = {
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
......@@ -67,6 +67,11 @@ static struct smatch mach_table[] = {
.liname = "SNI RM200_PCI",
.type = MACH_SNI_RM200_PCI,
.flags = PROM_FLAG_DONT_FREE_TEMP,
}, {
.arcname = "RM200PCI-R5K",
.liname = "SNI RM200_PCI-R5K",
.type = MACH_SNI_RM200_PCI,
.flags = PROM_FLAG_DONT_FREE_TEMP,
}
};
......
......@@ -216,6 +216,7 @@ int smp_call_function(void (*func) (void *info), void *info, int retry,
{
return smp_call_function_mask(cpu_online_map, func, info, retry, wait);
}
EXPORT_SYMBOL(smp_call_function);
void smp_call_function_interrupt(void)
{
......@@ -271,6 +272,7 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
put_cpu();
return 0;
}
EXPORT_SYMBOL(smp_call_function_single);
static void stop_this_cpu(void *dummy)
{
......
......@@ -34,11 +34,13 @@ static volatile int lasat_int_mask_shift;
void disable_lasat_irq(unsigned int irq_nr)
{
irq_nr -= LASAT_IRQ_BASE;
*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
}
void enable_lasat_irq(unsigned int irq_nr)
{
irq_nr -= LASAT_IRQ_BASE;
*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
}
......
......@@ -23,18 +23,19 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/mutex.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include "at93c.h"
/* New model description table */
#include "lasat_models.h"
static DEFINE_MUTEX(lasat_eeprom_mutex);
#define EEPROM_CRC(data, len) (~crc32(~0, data, len))
struct lasat_info lasat_board_info;
void update_bcastaddr(void);
int EEPROMRead(unsigned int pos, unsigned char *data, int len)
{
int i;
......@@ -258,10 +259,6 @@ int lasat_init_board_info(void)
sprintf(lasat_board_info.li_typestr, "%d", 10 * c);
}
#if defined(CONFIG_INET) && defined(CONFIG_SYSCTL)
update_bcastaddr();
#endif
return 0;
}
......@@ -269,6 +266,8 @@ void lasat_write_eeprom_info(void)
{
unsigned long crc;
mutex_lock(&lasat_eeprom_mutex);
/* Generate the CRC */
crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
sizeof(struct lasat_eeprom_struct) - 4);
......@@ -277,4 +276,6 @@ void lasat_write_eeprom_info(void)
/* Write the EEPROM info */
EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
sizeof(struct lasat_eeprom_struct));
mutex_unlock(&lasat_eeprom_mutex);
}
......@@ -29,15 +29,13 @@
#include <linux/string.h>
#include <linux/net.h>
#include <linux/inet.h>
#include <linux/mutex.h>
#include <linux/uaccess.h>
#include <asm/time.h>
#include "sysctl.h"
#ifdef CONFIG_DS1603
#include "ds1603.h"
static DEFINE_MUTEX(lasat_info_mutex);
#endif
/* Strategy function to write EEPROM after changing string entry */
int sysctl_lasatstring(ctl_table *table, int *name, int nlen,
......@@ -46,18 +44,15 @@ int sysctl_lasatstring(ctl_table *table, int *name, int nlen,
{
int r;
mutex_lock(&lasat_info_mutex);
r = sysctl_string(table, name,
nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
if (r < 0)
return r;
}
if (newval && newlen)
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 1;
return 0;
}
......@@ -67,14 +62,11 @@ int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
{
int r;
mutex_lock(&lasat_info_mutex);
r = proc_dostring(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
if ((!write) || r)
return r;
}
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 0;
}
......@@ -85,28 +77,24 @@ int proc_dolasatint(ctl_table *table, int write, struct file *filp,
{
int r;
mutex_lock(&lasat_info_mutex);
r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
if ((!write) || r)
return r;
}
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 0;
}
#ifdef CONFIG_DS1603
static int rtctmp;
#ifdef CONFIG_DS1603
/* proc function to read/write RealTime Clock */
int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
int r;
mutex_lock(&lasat_info_mutex);
if (!write) {
rtctmp = read_persistent_clock();
/* check for time < 0 and set to 0 */
......@@ -114,12 +102,11 @@ int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
rtctmp = 0;
}
r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
if (r)
return r;
}
rtc_mips_set_mmss(rtctmp);
mutex_unlock(&lasat_info_mutex);
if (write)
rtc_mips_set_mmss(rtctmp);
return 0;
}
......@@ -132,17 +119,14 @@ int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen,
{
int r;
mutex_lock(&lasat_info_mutex);
r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
if (r < 0)
return r;
}
if (newval && newlen)
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 1;
return 0;
}
#ifdef CONFIG_DS1603
......@@ -153,50 +137,27 @@ int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen,
{
int r;
mutex_lock(&lasat_info_mutex);
rtctmp = read_persistent_clock();
if (rtctmp < 0)
rtctmp = 0;
r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
if (r < 0)
return r;
}
if (newval && newlen)
rtc_mips_set_mmss(rtctmp);
mutex_unlock(&lasat_info_mutex);
return 1;
return r;
}
#endif
#ifdef CONFIG_INET
static char lasat_bcastaddr[16];
void update_bcastaddr(void)
{
unsigned int ip;
ip = (lasat_board_info.li_eeprom_info.ipaddr &
lasat_board_info.li_eeprom_info.netmask) |
~lasat_board_info.li_eeprom_info.netmask;
sprintf(lasat_bcastaddr, "%d.%d.%d.%d",
(ip) & 0xff,
(ip >> 8) & 0xff,
(ip >> 16) & 0xff,
(ip >> 24) & 0xff);
}
static char proc_lasat_ipbuf[32];
/* Parsing of IP address */
int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
unsigned int ip;
char *p, c;
int len;
char ipbuf[32];
if (!table->data || !table->maxlen || !*lenp ||
(*ppos && !write)) {
......@@ -204,117 +165,88 @@ int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
return 0;
}
mutex_lock(&lasat_info_mutex);
if (write) {
len = 0;
p = buffer;
while (len < *lenp) {
if (get_user(c, p++)) {
mutex_unlock(&lasat_info_mutex);
if (get_user(c, p++))
return -EFAULT;
}
if (c == 0 || c == '\n')
break;
len++;
}
if (len >= sizeof(proc_lasat_ipbuf)-1)
len = sizeof(proc_lasat_ipbuf) - 1;
if (copy_from_user(proc_lasat_ipbuf, buffer, len)) {
mutex_unlock(&lasat_info_mutex);
if (len >= sizeof(ipbuf)-1)
len = sizeof(ipbuf) - 1;
if (copy_from_user(ipbuf, buffer, len))
return -EFAULT;
}
proc_lasat_ipbuf[len] = 0;
ipbuf[len] = 0;
*ppos += *lenp;
/* Now see if we can convert it to a valid IP */
ip = in_aton(proc_lasat_ipbuf);
ip = in_aton(ipbuf);
*(unsigned int *)(table->data) = ip;
lasat_write_eeprom_info();
} else {
ip = *(unsigned int *)(table->data);
sprintf(proc_lasat_ipbuf, "%d.%d.%d.%d",
sprintf(ipbuf, "%d.%d.%d.%d",
(ip) & 0xff,
(ip >> 8) & 0xff,
(ip >> 16) & 0xff,
(ip >> 24) & 0xff);
len = strlen(proc_lasat_ipbuf);
len = strlen(ipbuf);
if (len > *lenp)
len = *lenp;
if (len)
if (copy_to_user(buffer, proc_lasat_ipbuf, len)) {
mutex_unlock(&lasat_info_mutex);
if (copy_to_user(buffer, ipbuf, len))
return -EFAULT;
}
if (len < *lenp) {
if (put_user('\n', ((char *) buffer) + len)) {
mutex_unlock(&lasat_info_mutex);
if (put_user('\n', ((char *) buffer) + len))
return -EFAULT;
}
len++;
}
*lenp = len;
*ppos += len;
}
update_bcastaddr();
mutex_unlock(&lasat_info_mutex);
return 0;
}
#endif /* defined(CONFIG_INET) */
#endif
static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen,
static int sysctl_lasat_prid(ctl_table *table, int *name, int nlen,
void *oldval, size_t *oldlenp,
void *newval, size_t newlen)
{
int r;
mutex_lock(&lasat_info_mutex);
r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
if (r < 0)
return r;
}
if (newval && newlen) {
if (name && *name == LASAT_PRID)
lasat_board_info.li_eeprom_info.prid = *(int *)newval;
lasat_board_info.li_eeprom_info.prid = *(int *)newval;
lasat_write_eeprom_info();
lasat_init_board_info();
}
mutex_unlock(&lasat_info_mutex);
return 0;
}
int proc_lasat_eeprom_value(ctl_table *table, int write, struct file *filp,
int proc_lasat_prid(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
int r;
mutex_lock(&lasat_info_mutex);
r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
if (r < 0)
return r;
if (write) {
lasat_board_info.li_eeprom_info.prid =
lasat_board_info.li_prid;
lasat_write_eeprom_info();
lasat_init_board_info();
}
if (filp && filp->f_path.dentry) {
if (!strcmp(filp->f_path.dentry->d_name.name, "prid"))
lasat_board_info.li_eeprom_info.prid =
lasat_board_info.li_prid;
if (!strcmp(filp->f_path.dentry->d_name.name, "debugaccess"))
lasat_board_info.li_eeprom_info.debugaccess =
lasat_board_info.li_debugaccess;
}
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 0;
}
extern int lasat_boot_to_service;
#ifdef CONFIG_SYSCTL
static ctl_table lasat_table[] = {
{
.ctl_name = CTL_UNNUMBERED,
......@@ -349,8 +281,8 @@ static ctl_table lasat_table[] = {
.data = &lasat_board_info.li_prid,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = &proc_lasat_eeprom_value,
.strategy = &sysctl_lasat_eeprom_value
.proc_handler = &proc_lasat_prid,
.strategy = &sysctl_lasat_prid
},
#ifdef CONFIG_INET
{
......@@ -363,7 +295,7 @@ static ctl_table lasat_table[] = {
.strategy = &sysctl_lasat_intvec
},
{
.ctl_name = LASAT_NETMASK,
.ctl_name = CTL_UNNUMBERED,
.procname = "netmask",
.data = &lasat_board_info.li_eeprom_info.netmask,
.maxlen = sizeof(int),
......@@ -371,15 +303,6 @@ static ctl_table lasat_table[] = {
.proc_handler = &proc_lasat_ip,
.strategy = &sysctl_lasat_intvec
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "bcastaddr",
.data = &lasat_bcastaddr,
.maxlen = sizeof(lasat_bcastaddr),
.mode = 0600,
.proc_handler = &proc_dostring,
.strategy = &sysctl_string
},
#endif
{
.ctl_name = CTL_UNNUMBERED,
......@@ -417,7 +340,7 @@ static ctl_table lasat_table[] = {
.data = &lasat_board_info.li_namestr,
.maxlen = sizeof(lasat_board_info.li_namestr),
.mode = 0444,
.proc_handler = &proc_dostring,
.proc_handler = &proc_dostring,
.strategy = &sysctl_string
},
{
......@@ -448,9 +371,12 @@ static int __init lasat_register_sysctl(void)
lasat_table_header =
register_sysctl_table(lasat_root_table);
if (!lasat_table_header) {
printk(KERN_ERR "Unable to register LASAT sysctl\n");
return -ENOMEM;
}
return 0;
}
__initcall(lasat_register_sysctl);
#endif /* CONFIG_SYSCTL */
/*
* LASAT sysctl values
*/
#ifndef _LASAT_SYSCTL_H
#define _LASAT_SYSCTL_H
/* /proc/sys/lasat */
enum {
LASAT_CPU_HZ = 1,
LASAT_BUS_HZ,
LASAT_MODEL,
LASAT_PRID,
LASAT_IPADDR,
LASAT_NETMASK,
LASAT_BCAST,
LASAT_PASSWORD,
LASAT_SBOOT,
LASAT_RTC,
LASAT_NAMESTR,
LASAT_TYPESTR,
};
#endif /* _LASAT_SYSCTL_H */
......@@ -28,7 +28,7 @@
int amon_cpu_avail(int cpu)
{
struct cpulaunch *launch = (struct cpulaunch *)KSEG0ADDR(CPULAUNCH);
struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
if (cpu < 0 || cpu >= NCPULAUNCH) {
pr_debug("avail: cpu%d is out of range\n", cpu);
......@@ -53,7 +53,7 @@ void amon_cpu_start(int cpu,
unsigned long gp, unsigned long a0)
{
volatile struct cpulaunch *launch =
(struct cpulaunch *)KSEG0ADDR(CPULAUNCH);
(struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
if (!amon_cpu_avail(cpu))
return;
......
......@@ -19,9 +19,8 @@
# under Linux.
#
obj-y := malta_int.o malta_platform.o malta_setup.o
obj-y := malta_int.o malta_mtd.o malta_platform.o malta_setup.o
obj-$(CONFIG_MTD) += malta_mtd.o
# FIXME FIXME FIXME
obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
......
......@@ -446,6 +446,7 @@ static inline void local_r4k_flush_cache_page(void *args)
struct page *page = pfn_to_page(fcp_args->pfn);
int exec = vma->vm_flags & VM_EXEC;
struct mm_struct *mm = vma->vm_mm;
int map_coherent = 0;
pgd_t *pgdp;
pud_t *pudp;
pmd_t *pmdp;
......@@ -479,7 +480,9 @@ static inline void local_r4k_flush_cache_page(void *args)
* Use kmap_coherent or kmap_atomic to do flushes for
* another ASID than the current one.
*/
if (cpu_has_dc_aliases)
map_coherent = (cpu_has_dc_aliases &&
page_mapped(page) && !Page_dcache_dirty(page));
if (map_coherent)
vaddr = kmap_coherent(page, addr);
else
vaddr = kmap_atomic(page, KM_USER0);
......@@ -502,7 +505,7 @@ static inline void local_r4k_flush_cache_page(void *args)
}
if (vaddr) {
if (cpu_has_dc_aliases)
if (map_coherent)
kunmap_coherent();
else
kunmap_atomic(vaddr, KM_USER0);
......@@ -1226,6 +1229,28 @@ void au1x00_fixup_config_od(void)
}
}
/* CP0 hazard avoidance. */
#define NXP_BARRIER() \
__asm__ __volatile__( \
".set noreorder\n\t" \
"nop; nop; nop; nop; nop; nop;\n\t" \
".set reorder\n\t")
static void nxp_pr4450_fixup_config(void)
{
unsigned long config0;
config0 = read_c0_config();
/* clear all three cache coherency fields */
config0 &= ~(0x7 | (7 << 25) | (7 << 28));
config0 |= (((_page_cachable_default >> _CACHE_SHIFT) << 0) |
((_page_cachable_default >> _CACHE_SHIFT) << 25) |
((_page_cachable_default >> _CACHE_SHIFT) << 28));
write_c0_config(config0);
NXP_BARRIER();
}
static int __cpuinitdata cca = -1;
static int __init cca_setup(char *str)
......@@ -1271,6 +1296,10 @@ static void __cpuinit coherency_setup(void)
case CPU_AU1500: /* rev. AB */
au1x00_fixup_config_od();
break;
case PRID_IMP_PR4450:
nxp_pr4450_fixup_config();
break;
}
}
......
......@@ -71,6 +71,7 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
* don't have to care about aliases on other CPUs.
*/
unsigned long empty_zero_page, zero_page_mask;
EXPORT_SYMBOL_GPL(empty_zero_page);
/*
* Not static inline because used by IP27 special magic initialization code
......
......@@ -460,7 +460,7 @@ void __cpuinit build_copy_page(void)
build_copy_load_pref(&buf, -off);
off -= cache_line_size;
}
off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
off = cache_line_size ? min(8, pref_bias_copy_store / cache_line_size) *
cache_line_size : 0;
while (off) {
build_copy_store_pref(&buf, -off);
......
......@@ -47,16 +47,7 @@
void __init board_setup(void)
{
unsigned long config0, configpr;
config0 = read_c0_config();
/* clear all three cache coherency fields */
config0 &= ~(0x7 | (7<<25) | (7<<28));
config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
(CONF_CM_DEFAULT<<28));
write_c0_config(config0);
BARRIER;
unsigned long configpr;
configpr = read_c0_config7();
configpr |= (1<<19); /* enable tlb */
......
......@@ -33,15 +33,7 @@
void __init board_setup(void)
{
unsigned long config0, configpr;
config0 = read_c0_config();
/* clear all three cache coherency fields */
config0 &= ~(0x7 | (7<<25) | (7<<28));
config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
(CONF_CM_DEFAULT<<28));
write_c0_config(config0);
unsigned long configpr;
configpr = read_c0_config7();
configpr |= (1<<19); /* enable tlb */
......
......@@ -207,6 +207,7 @@ struct pci_controller sb1250_controller = {
static int __init sb1250_pcibios_init(void)
{
void __iomem *io_map_base;
uint32_t cmdreg;
uint64_t reg;
extern int pci_probe_only;
......@@ -253,12 +254,13 @@ static int __init sb1250_pcibios_init(void)
* works correctly with most of Linux's drivers.
* XXX ehs: Should this happen in PCI Device mode?
*/
set_io_port_base((unsigned long)
ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 65536));
isa_slot_offset = (unsigned long)
ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES_32, 1024 * 1024);
io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
sb1250_controller.io_map_base = io_map_base;
set_io_port_base((unsigned long)io_map_base);
#ifdef CONFIG_SIBYTE_HAS_LDT
/*
* Also check the LDT bridge's enable, just in case we didn't
......
......@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* Copyright (C) 2004-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify
......@@ -300,6 +300,18 @@ static int __init vr41xx_pciu_init(void)
ioport_resource.end = IO_PORT_RESOURCE_END;
}
if (setup->master_io) {
void __iomem *io_map_base;
struct resource *res = vr41xx_pci_controller.io_resource;
master = setup->master_io;
io_map_base = ioremap(master->bus_base_address,
res->end - res->start + 1);
if (!io_map_base)
return -EBUSY;
vr41xx_pci_controller.io_map_base = (unsigned long)io_map_base;
}
register_pci_controller(&vr41xx_pci_controller);
return 0;
......
lib-y = setup.o rtc_xicor1241.o rtc_m41t81.o
obj-y := setup.o rtc_xicor1241.o rtc_m41t81.o
lib-$(CONFIG_KGDB) += dbg_io.o
obj-$(CONFIG_KGDB) += dbg_io.o
......@@ -56,7 +56,7 @@ struct cpuinfo_mips {
struct cache_desc tcache; /* Tertiary/split secondary cache */
int srsets; /* Shadow register sets */
int core; /* physical core number */
#if defined(CONFIG_MIPS_MT_SMTC)
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
/*
* In the MIPS MT "SMTC" model, each TC is considered
* to be a "CPU" for the purposes of scheduling, but
......@@ -64,7 +64,7 @@ struct cpuinfo_mips {
* to all TCs within the same VPE.
*/
int vpe_id; /* Virtual Processor number */
#endif /* CONFIG_MIPS_MT */
#endif
#ifdef CONFIG_MIPS_MT_SMTC
int tc_id; /* Thread Context number */
#endif
......
......@@ -24,8 +24,8 @@
#define MSK(n) ((1 << (n)) - 1)
#define REG32(addr) (*(volatile unsigned int *) (addr))
#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS)
#define REGP(base, phys) REG32((unsigned int)(base) + (phys))
#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS)
#define REGP(base, phys) REG32((unsigned long)(base) + (phys))
/* Accessors */
#define GIC_REG(segment, offset) \
......
......@@ -4,10 +4,10 @@
#define LASAT_BASE_BAUD_100 (7372800 / 16)
#define LASAT_UART_REGS_BASE_100 0x1c8b0000
#define LASAT_UART_REGS_SHIFT_100 2
#define LASATINT_UART_100 8
#define LASATINT_UART_100 16
/* * LASAT 200 boards serial configuration */
#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
#define LASAT_UART_REGS_SHIFT_200 3
#define LASATINT_UART_200 13
#define LASATINT_UART_200 21
......@@ -615,6 +615,7 @@ enum soc_au1500_ints {
AU1000_RTC_MATCH1_INT,
AU1000_RTC_MATCH2_INT,
AU1500_PCI_ERR_INT,
AU1500_RESERVED_INT,
AU1000_USB_DEV_REQ_INT,
AU1000_USB_DEV_SUS_INT,
AU1000_USB_HOST_INT,
......
......@@ -134,6 +134,4 @@
#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT)
#endif /* _ASM_PGTABLE_BITS_H */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment