Commit 6270d22d authored by Oskar Senft's avatar Oskar Senft Committed by Greg Kroah-Hartman

dt-bindings: serial: 8250: Add aspeed,sirq-polarity-sense.

Add documentation for 8250_aspeed_vuart's aspeed,sirq-polarity-sense
property that enables to auto-configure the VUART's SIRQ polarity.
Signed-off-by: default avatarOskar Senft <osk@google.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20190905144130.220713-2-osk@google.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8d310c91
...@@ -56,6 +56,11 @@ Optional properties: ...@@ -56,6 +56,11 @@ Optional properties:
- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
line respectively. It will use specified GPIO instead of the peripheral line respectively. It will use specified GPIO instead of the peripheral
function pin for the UART feature. If unsure, don't specify this property. function pin for the UART feature. If unsure, don't specify this property.
- aspeed,sirq-polarity-sense: Only applicable to aspeed,ast2500-vuart.
phandle to aspeed,ast2500-scu compatible syscon alongside register offset
and bit number to identify how the SIRQ polarity should be configured.
One possible data source is the LPC/eSPI mode bit.
Example: aspeed,sirq-polarity-sense = <&syscon 0x70 25>
Note: Note:
* fsl,ns16550: * fsl,ns16550:
......
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