Commit 62710c12 authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Stephen Boyd

clk: stm32f4: Add SAI clocks

This patch introduces SAI clocks for stm32f4 socs.
Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 12696bac
...@@ -948,6 +948,9 @@ static const char *lcd_parent[1] = { "pllsai-r-div" }; ...@@ -948,6 +948,9 @@ static const char *lcd_parent[1] = { "pllsai-r-div" };
static const char *i2s_parents[2] = { "plli2s-r", NULL }; static const char *i2s_parents[2] = { "plli2s-r", NULL };
static const char *sai_parents[4] = { "pllsai-q-div", "plli2s-q-div", NULL,
"no-clock" };
struct stm32_aux_clk { struct stm32_aux_clk {
int idx; int idx;
const char *name; const char *name;
...@@ -983,6 +986,18 @@ static const struct stm32_aux_clk stm32f429_aux_clk[] = { ...@@ -983,6 +986,18 @@ static const struct stm32_aux_clk stm32f429_aux_clk[] = {
NO_GATE, 0, NO_GATE, 0,
CLK_SET_RATE_PARENT CLK_SET_RATE_PARENT
}, },
{
CLK_SAI1, "sai1-a", sai_parents, ARRAY_SIZE(sai_parents),
STM32F4_RCC_DCKCFGR, 20, 3,
STM32F4_RCC_APB2ENR, 22,
CLK_SET_RATE_PARENT
},
{
CLK_SAI2, "sai1-b", sai_parents, ARRAY_SIZE(sai_parents),
STM32F4_RCC_DCKCFGR, 22, 3,
STM32F4_RCC_APB2ENR, 22,
CLK_SET_RATE_PARENT
},
}; };
static const struct stm32f4_clk_data stm32f429_clk_data = { static const struct stm32f4_clk_data stm32f429_clk_data = {
...@@ -1115,6 +1130,7 @@ static void __init stm32f4_rcc_init(struct device_node *np) ...@@ -1115,6 +1130,7 @@ static void __init stm32f4_rcc_init(struct device_node *np)
i2s_in_clk = of_clk_get_parent_name(np, 1); i2s_in_clk = of_clk_get_parent_name(np, 1);
i2s_parents[1] = i2s_in_clk; i2s_parents[1] = i2s_in_clk;
sai_parents[2] = i2s_in_clk;
clk_register_fixed_rate_with_accuracy(NULL, "hsi", NULL, 0, clk_register_fixed_rate_with_accuracy(NULL, "hsi", NULL, 0,
16000000, 160000); 16000000, 160000);
......
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