Commit 627a78b2 authored by Ulf Hansson's avatar Ulf Hansson

mmc: Merge branch fixes into next

Merge the mmc fixes for v6.0rc[n] into the next branch, to allow them to
get tested together with the new mmc changes that are targeted for v6.1.
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parents a7c99868 35ca91d1
...@@ -111,8 +111,8 @@ ...@@ -111,8 +111,8 @@
#define CLK_DIV_MASK 0x7f #define CLK_DIV_MASK 0x7f
/* REG_BUS_WIDTH */ /* REG_BUS_WIDTH */
#define BUS_WIDTH_8 BIT(2) #define BUS_WIDTH_4_SUPPORT BIT(3)
#define BUS_WIDTH_4 BIT(1) #define BUS_WIDTH_4 BIT(2)
#define BUS_WIDTH_1 BIT(0) #define BUS_WIDTH_1 BIT(0)
#define MMC_VDD_360 23 #define MMC_VDD_360 23
...@@ -524,9 +524,6 @@ static void moxart_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ...@@ -524,9 +524,6 @@ static void moxart_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
case MMC_BUS_WIDTH_4: case MMC_BUS_WIDTH_4:
writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH); writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
break; break;
case MMC_BUS_WIDTH_8:
writel(BUS_WIDTH_8, host->base + REG_BUS_WIDTH);
break;
default: default:
writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH); writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
break; break;
...@@ -651,16 +648,8 @@ static int moxart_probe(struct platform_device *pdev) ...@@ -651,16 +648,8 @@ static int moxart_probe(struct platform_device *pdev)
dmaengine_slave_config(host->dma_chan_rx, &cfg); dmaengine_slave_config(host->dma_chan_rx, &cfg);
} }
switch ((readl(host->base + REG_BUS_WIDTH) >> 3) & 3) { if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)
case 1:
mmc->caps |= MMC_CAP_4_BIT_DATA; mmc->caps |= MMC_CAP_4_BIT_DATA;
break;
case 2:
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
break;
default:
break;
}
writel(0, host->base + REG_INTERRUPT_MASK); writel(0, host->base + REG_INTERRUPT_MASK);
......
...@@ -3928,7 +3928,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error, ...@@ -3928,7 +3928,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) { if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) {
*cmd_error = -EILSEQ; *cmd_error = -EILSEQ;
if (!mmc_op_tuning(host->cmd->opcode)) if (!mmc_op_tuning(SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))))
sdhci_err_stats_inc(host, CMD_CRC); sdhci_err_stats_inc(host, CMD_CRC);
} else if (intmask & SDHCI_INT_TIMEOUT) { } else if (intmask & SDHCI_INT_TIMEOUT) {
*cmd_error = -ETIMEDOUT; *cmd_error = -ETIMEDOUT;
...@@ -3938,7 +3938,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error, ...@@ -3938,7 +3938,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) { if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) {
*data_error = -EILSEQ; *data_error = -EILSEQ;
if (!mmc_op_tuning(host->cmd->opcode)) if (!mmc_op_tuning(SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))))
sdhci_err_stats_inc(host, DAT_CRC); sdhci_err_stats_inc(host, DAT_CRC);
} else if (intmask & SDHCI_INT_DATA_TIMEOUT) { } else if (intmask & SDHCI_INT_DATA_TIMEOUT) {
*data_error = -ETIMEDOUT; *data_error = -ETIMEDOUT;
......
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