Commit 6330c790 authored by Mark Salter's avatar Mark Salter

C6X: add Lx_CACHE_SHIFT defines

C6X currently lacks Lx_CACHE_SHIFT defines which are needed in a
few places in the generic kernel. This patch adds _SHIFT defines
for the various caches and bases the Lx_CACHE_BYTES defines on
them.
Signed-off-by: default avatarMark Salter <msalter@redhat.com>
parent 28a33cbc
/* /*
* Port on Texas Instruments TMS320C6x architecture * Port on Texas Instruments TMS320C6x architecture
* *
* Copyright (C) 2005, 2006, 2009, 2010 Texas Instruments Incorporated * Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
...@@ -16,9 +16,14 @@ ...@@ -16,9 +16,14 @@
/* /*
* Cache line size * Cache line size
*/ */
#define L1D_CACHE_BYTES 64 #define L1D_CACHE_SHIFT 6
#define L1P_CACHE_BYTES 32 #define L1D_CACHE_BYTES (1 << L1D_CACHE_SHIFT)
#define L2_CACHE_BYTES 128
#define L1P_CACHE_SHIFT 5
#define L1P_CACHE_BYTES (1 << L1P_CACHE_SHIFT)
#define L2_CACHE_SHIFT 7
#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT)
/* /*
* L2 used as cache * L2 used as cache
...@@ -29,7 +34,8 @@ ...@@ -29,7 +34,8 @@
* For practical reasons the L1_CACHE_BYTES defines should not be smaller than * For practical reasons the L1_CACHE_BYTES defines should not be smaller than
* the L2 line size * the L2 line size
*/ */
#define L1_CACHE_BYTES L2_CACHE_BYTES #define L1_CACHE_SHIFT L2_CACHE_SHIFT
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L2_CACHE_ALIGN_LOW(x) \ #define L2_CACHE_ALIGN_LOW(x) \
(((x) & ~(L2_CACHE_BYTES - 1))) (((x) & ~(L2_CACHE_BYTES - 1)))
......
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