Commit 63716633 authored by Heiko Schocher's avatar Heiko Schocher Committed by Kumar Gala

powerpc: Add support for mpc8247 based board MGCOGE from keymile.

Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent e14d4af0
/*
* Device Tree for the MGCOGE plattform from keymile
*
* Copyright 2008 DENX Software Engineering GmbH
* Heiko Schocher <hs@denx.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "MGCOGE";
compatible = "keymile,mgcoge";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &eth0;
serial0 = &smc2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8247@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <16384>;
i-cache-size = <16384>;
timebase-frequency = <0>; /* Filled in by U-Boot */
clock-frequency = <0>; /* Filled in by U-Boot */
bus-frequency = <0>; /* Filled in by U-Boot */
};
};
localbus@f0010100 {
compatible = "fsl,mpc8247-localbus",
"fsl,pq2-localbus",
"simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xf0010100 0x40>;
ranges = <0 0 0xfe000000 0x00400000
5 0 0x50000000 0x20000000
>; /* Filled in by U-Boot */
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x0 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <1>;
device-width = <1>;
partition@0 {
label = "u-boot";
reg = <0 0x40000>;
};
partition@40000 {
label = "env";
reg = <0x40000 0x20000>;
};
partition@60000 {
label = "kernel";
reg = <0x60000 0x220000>;
};
partition@280000 {
label = "dtb";
reg = <0x280000 0x20000>;
};
};
flash@5,0 {
compatible = "cfi-flash";
reg = <5 0x0 0x2000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
device-width = <2>;
partition@0 {
label = "ramdisk";
reg = <0 0x7a0000>;
};
partition@7a0000 {
label = "user";
reg = <0x7a0000 0x1860000>;
};
};
};
memory {
device_type = "memory";
reg = <0 0>; /* Filled in by U-Boot */
};
soc@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
ranges = <0x00000000 0xf0000000 0x00053000>;
// Temporary until code stops depending on it.
device_type = "soc";
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
"simple-bus";
reg = <0x119c0 0x30>;
ranges;
muram {
compatible = "fsl,cpm-muram";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0x80 0x1f80 0x9800 0x800>;
};
};
brg@119f0 {
compatible = "fsl,mpc8247-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <0x119f0 0x10 0x115f0 0x10>;
};
/* Monitor port/SMC2 */
smc2: serial@11a90 {
device_type = "serial";
compatible = "fsl,mpc8247-smc-uart",
"fsl,cpm2-smc-uart";
reg = <0x11a90 0x20 0x88fc 0x02>;
interrupts = <5 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <2>;
fsl,cpm-command = <0x21200000>;
current-speed = <0>; /* Filled in by U-Boot */
};
eth0: ethernet@11a60 {
device_type = "network";
compatible = "fsl,mpc8247-scc-enet",
"fsl,cpm2-scc-enet";
reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
interrupts = <43 8>;
interrupt-parent = <&PIC>;
linux,network-index = <0>;
fsl,cpm-command = <0xce00000>;
fixed-link = <0 0 10 0 0>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x10c00 0x80>;
compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
};
};
};
This diff is collapsed.
......@@ -38,6 +38,14 @@ config EP8248E
This board is also resold by Freescale as the QUICCStart
MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
config MGCOGE
bool "Keymile MGCOGE"
select 8272
select 8260
select FSL_SOC
help
This enables support for the Keymile MGCOGE board.
endif
config PQ2ADS
......
......@@ -6,3 +6,4 @@ obj-$(CONFIG_CPM2) += pq2.o
obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
obj-$(CONFIG_PQ2FADS) += pq2fads.o
obj-$(CONFIG_EP8248E) += ep8248e.o
obj-$(CONFIG_MGCOGE) += mgcoge.o
/*
* Keymile mgcoge support
* Copyright 2008 DENX Software Engineering GmbH
* Author: Heiko Schocher <hs@denx.de>
*
* based on code from:
* Copyright 2007 Freescale Semiconductor, Inc.
* Author: Scott Wood <scottwood@freescale.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/mpc8260.h>
#include <asm/prom.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/cpm2_pic.h>
#include "pq2.h"
static void __init mgcoge_pic_init(void)
{
struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
if (!np) {
printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
return;
}
cpm2_pic_init(np);
of_node_put(np);
}
struct cpm_pin {
int port, pin, flags;
};
static __initdata struct cpm_pin mgcoge_pins[] = {
/* SMC2 */
{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{1, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
/* SCC4 */
{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{3, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{3, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{3, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{4, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{4, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
};
static void __init init_ioports(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) {
const struct cpm_pin *pin = &mgcoge_pins[i];
cpm2_set_pin(pin->port - 1, pin->pin, pin->flags);
}
cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
}
static void __init mgcoge_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("mgcoge_setup_arch()", 0);
cpm2_reset();
/* When this is set, snooping CPM DMA from RAM causes
* machine checks. See erratum SIU18.
*/
clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
init_ioports();
if (ppc_md.progress)
ppc_md.progress("mgcoge_setup_arch(), finish", 0);
}
static __initdata struct of_device_id of_bus_ids[] = {
{ .compatible = "simple-bus", },
{},
};
static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
machine_device_initcall(mgcoge, declare_of_platform_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init mgcoge_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "keymile,mgcoge");
}
define_machine(mgcoge)
{
.name = "Keymile MGCOGE",
.probe = mgcoge_probe,
.setup_arch = mgcoge_setup_arch,
.init_IRQ = mgcoge_pic_init,
.get_irq = cpm2_get_irq,
.calibrate_decr = generic_calibrate_decr,
.restart = pq2_restart,
.progress = udbg_progress,
};
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